Datasheet AD8285 (Analog Devices) - 2
| Manufacturer | Analog Devices |
| Description | Radar Receive Path AFE: 4-Channel LNA/PGA/AAF with ADC |
| Pages / Page | 27 / 2 — AD8285. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 9/15—Rev. A to … |
| Revision | B |
| File Format / Size | PDF / 511 Kb |
| Document Language | English |
AD8285. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 9/15—Rev. A to Rev. B. 10/14—Rev. 0 to Rev. A
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AD8285 Data Sheet TABLE OF CONTENTS
Features .. 1 SDIO Pin .. 17 Applications ... 1 SCLK Pin ... 17 Functional Block Diagram .. 1 CS Pin .. 17 General Description ... 1 RBIAS Pin .. 17 Revision History ... 2 Voltage Reference ... 18 Specifications ... 3 Power and Ground Recommendations ... 18 AC Specifications .. 3 Exposed Paddle Thermal Heat Slug Recommendations .. 18 Digital Specifications ... 5 Serial Peripheral Interface (SPI) ... 19 Switching Specifications .. 6 Hardware Interface ... 19 Absolute Maximum Ratings .. 7 Memory Map .. 21 ESD Caution .. 7 Reading the Memory Map Table .. 21 Pin Configuration and Function Descriptions ... 8 Logic Levels ... 21 Typical Performance Characteristics ... 10 Reserved Locations .. 21 Theory of Operation .. 14 Default Values ... 21 Radar Receive Path AFE .. 14 Application Diagrams .. 25 Channel Overview .. 15 Outline Dimensions ... 27 ADC ... 16 Ordering Guide .. 27 Clock Input Considerations .. 16 Automotive Products ... 27 Clock Duty Cycle Considerations .. 17 Clock Jitter Considerations ... 17
REVISION HISTORY 9/15—Rev. A to Rev. B
Added Table 1; Renumbered Sequentially .. 1
10/14—Rev. 0 to Rev. A
Changes to Addr. (Hex) 0x15, Table 8 ... 23 Changes to Ordering Guide .. 27
5/14—Revision 0: Initial Version
Rev. B | Page 2 of 27 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION RADAR RECEIVE PATH AFE CHANNEL OVERVIEW Low Noise Amplifier (LNA) Recommendation Antialiasing Filter (AAF) Mux and Mux Controller ADC CLOCK INPUT CONSIDERATIONS CLOCK DUTY CYCLE CONSIDERATIONS CLOCK JITTER CONSIDERATIONS SDIO PIN SCLK PIN CS\ PIN RBIAS PIN VOLTAGE REFERENCE POWER AND GROUND RECOMMENDATIONS EXPOSED PADDLE THERMAL HEAT SLUG RECOMMENDATIONS SERIAL PERIPHERAL INTERFACE (SPI) HARDWARE INTERFACE MEMORY MAP READING THE MEMORY MAP TABLE LOGIC LEVELS RESERVED LOCATIONS DEFAULT VALUES APPLICATION DIAGRAMS OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS
AD8285 Data Sheet TABLE OF CONTENTS
Features .. 1 SDIO Pin .. 17 Applications ... 1 SCLK Pin ... 17 Functional Block Diagram .. 1 CS Pin .. 17 General Description ... 1 RBIAS Pin .. 17 Revision History ... 2 Voltage Reference ... 18 Specifications ... 3 Power and Ground Recommendations ... 18 AC Specifications .. 3 Exposed Paddle Thermal Heat Slug Recommendations .. 18 Digital Specifications ... 5 Serial Peripheral Interface (SPI) ... 19 Switching Specifications .. 6 Hardware Interface ... 19 Absolute Maximum Ratings .. 7 Memory Map .. 21 ESD Caution .. 7 Reading the Memory Map Table .. 21 Pin Configuration and Function Descriptions ... 8 Logic Levels ... 21 Typical Performance Characteristics ... 10 Reserved Locations .. 21 Theory of Operation .. 14 Default Values ... 21 Radar Receive Path AFE .. 14 Application Diagrams .. 25 Channel Overview .. 15 Outline Dimensions ... 27 ADC ... 16 Ordering Guide .. 27 Clock Input Considerations .. 16 Automotive Products ... 27 Clock Duty Cycle Considerations .. 17 Clock Jitter Considerations ... 17
REVISION HISTORY 9/15—Rev. A to Rev. B
Added Table 1; Renumbered Sequentially .. 1
10/14—Rev. 0 to Rev. A
Changes to Addr. (Hex) 0x15, Table 8 ... 23 Changes to Ordering Guide .. 27
5/14—Revision 0: Initial Version
Rev. B | Page 2 of 27 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION RADAR RECEIVE PATH AFE CHANNEL OVERVIEW Low Noise Amplifier (LNA) Recommendation Antialiasing Filter (AAF) Mux and Mux Controller ADC CLOCK INPUT CONSIDERATIONS CLOCK DUTY CYCLE CONSIDERATIONS CLOCK JITTER CONSIDERATIONS SDIO PIN SCLK PIN CS\ PIN RBIAS PIN VOLTAGE REFERENCE POWER AND GROUND RECOMMENDATIONS EXPOSED PADDLE THERMAL HEAT SLUG RECOMMENDATIONS SERIAL PERIPHERAL INTERFACE (SPI) HARDWARE INTERFACE MEMORY MAP READING THE MEMORY MAP TABLE LOGIC LEVELS RESERVED LOCATIONS DEFAULT VALUES APPLICATION DIAGRAMS OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS
