Datasheet ADL5201 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | Wide Dynamic Range, High Speed, Digitally Controlled VGA |
| Pages / Page | 26 / 10 — ADL5201. Data Sheet. –11.5dB. 0dB. +10dB. +20dB. B d. 3 (. OIP. INPUT. … |
| Revision | C |
| File Format / Size | PDF / 909 Kb |
| Document Language | English |
ADL5201. Data Sheet. –11.5dB. 0dB. +10dB. +20dB. B d. 3 (. OIP. INPUT. MAX RATINGS. BOUNDARY. 100. 150. 200. 250. 300. 350. 400. FREQUENCY (MHz). OUT (dBm)
Model Line for this Datasheet
Text Version of Document
ADL5201 Data Sheet 60 60 –11.5dB –11.5dB 0dB 0dB +10dB 55 +10dB 55 +20dB +20dB 50 50 ) 45 ) m m B d B 45 d 3 ( 40 3 ( OIP OIP 35 40 INPUT MAX RATINGS 30 BOUNDARY 35 25 30 20 0 50 100 150 200 250 300 350 400
23 6 -0
–4 –3 –2 –1 0 1 2 3 4 5 6
-02
FREQUENCY (MHz)
388
P
388 09
OUT (dBm)
09 Figure 24. Output Third-Order Intercept vs. Frequency Figure 27. Output Third-Order Intercept vs. Power at Four Gain Codes, at Four Gain Codes, Low Power Mode at 2 V p-p Composite Frequency = 140 MHz, Low Power Mode
60 60 TA = –40°C T T A = –40°C A = +25°C T T A = +25°C 55 A = +85°C 55 TA = +85°C 50 50 ) ) m m B B d 45 (d 45 3 ( IP3 OIP O 40 40 35 35 30 30
4
0 50 100 150 200 250 300 350 400 –4 –3 –2 –1 0 1 2 3 4 5 6
02 027 88-
FREQUENCY (MHz) P
093
OUT (dBm)
09388- Figure 25. Output Third-Order Intercept vs. Frequency, Figure 28. Output Third-Order Intercept vs. Power, Three Temperatures, Low Power Mode Three Temperatures, Low Power Mode at 2 V p-p Composite
–60 –60 46MHz T 140MHz A = –40°C T 300MHz A = +25°C –70 T –70 A = +85°C –80 –80 ) ) Bc d Bc d –90 –90 D3 ( D3 ( IM IM –100 –100 –110 –110 –120
5
–120 –15 –10 –5 0 5 10 15 20 25
02
0 50 100 150 200 250 300 350 400
028 88-
PROGRAMMED GAIN (dB) FREQUENCY (MHz)
9388- 093 0 Figure 26. Two-Tone Output IMD3 vs. Programmed Gain Figure 29. Two-Tone Output IMD3 vs. Frequency, at 46 MHz, 140 MHz, and 300 MHz; Low Power Mode Three Temperatures, Low Power Mode Rev. C | Page 10 of 26 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS CHARACTERIZATION AND TEST CIRCUITS THEORY OF OPERATION DIGITAL INTERFACE OVERVIEW PARALLEL DIGITAL INTERFACE SERIAL PERIPHERAL INTERFACE (SPI) Fast Attack UP/DOWN INTERFACE Truth Table LOGIC TIMING CIRCUIT DESCRIPTION BASIC STRUCTURE INPUT SYSTEM OUTPUT AMPLIFIER GAIN CONTROL APPLICATIONS INFORMATION BASIC CONNECTIONS ADC DRIVING LAYOUT CONSIDERATIONS EVALUATION BOARD EVALUATION BOARD CONTROL SOFTWARE SCHEMATICS AND ARTWORK EVALUATION BOARD CONFIGURATION OPTIONS Configuration Options for the Main Section Configuration Options for the USB Section OUTLINE DIMENSIONS ORDERING GUIDE
23 6 -0
–4 –3 –2 –1 0 1 2 3 4 5 6
-02
FREQUENCY (MHz)
388
P
388 09
OUT (dBm)
09 Figure 24. Output Third-Order Intercept vs. Frequency Figure 27. Output Third-Order Intercept vs. Power at Four Gain Codes, at Four Gain Codes, Low Power Mode at 2 V p-p Composite Frequency = 140 MHz, Low Power Mode
60 60 TA = –40°C T T A = –40°C A = +25°C T T A = +25°C 55 A = +85°C 55 TA = +85°C 50 50 ) ) m m B B d 45 (d 45 3 ( IP3 OIP O 40 40 35 35 30 30
4
0 50 100 150 200 250 300 350 400 –4 –3 –2 –1 0 1 2 3 4 5 6
02 027 88-
FREQUENCY (MHz) P
093
OUT (dBm)
09388- Figure 25. Output Third-Order Intercept vs. Frequency, Figure 28. Output Third-Order Intercept vs. Power, Three Temperatures, Low Power Mode Three Temperatures, Low Power Mode at 2 V p-p Composite
–60 –60 46MHz T 140MHz A = –40°C T 300MHz A = +25°C –70 T –70 A = +85°C –80 –80 ) ) Bc d Bc d –90 –90 D3 ( D3 ( IM IM –100 –100 –110 –110 –120
5
–120 –15 –10 –5 0 5 10 15 20 25
02
0 50 100 150 200 250 300 350 400
028 88-
PROGRAMMED GAIN (dB) FREQUENCY (MHz)
9388- 093 0 Figure 26. Two-Tone Output IMD3 vs. Programmed Gain Figure 29. Two-Tone Output IMD3 vs. Frequency, at 46 MHz, 140 MHz, and 300 MHz; Low Power Mode Three Temperatures, Low Power Mode Rev. C | Page 10 of 26 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS CHARACTERIZATION AND TEST CIRCUITS THEORY OF OPERATION DIGITAL INTERFACE OVERVIEW PARALLEL DIGITAL INTERFACE SERIAL PERIPHERAL INTERFACE (SPI) Fast Attack UP/DOWN INTERFACE Truth Table LOGIC TIMING CIRCUIT DESCRIPTION BASIC STRUCTURE INPUT SYSTEM OUTPUT AMPLIFIER GAIN CONTROL APPLICATIONS INFORMATION BASIC CONNECTIONS ADC DRIVING LAYOUT CONSIDERATIONS EVALUATION BOARD EVALUATION BOARD CONTROL SOFTWARE SCHEMATICS AND ARTWORK EVALUATION BOARD CONFIGURATION OPTIONS Configuration Options for the Main Section Configuration Options for the USB Section OUTLINE DIMENSIONS ORDERING GUIDE
