Datasheet MAX25600 (Maxim) - 10
| Manufacturer | Maxim |
| Description | Synchronous High Voltage 4 Switch Buck Boost LED Controller |
| Pages / Page | 24 / 10 — Pin Description (continued). PIN. NAME. FUNCTION. TQFN. TSSOP |
| File Format / Size | PDF / 1.3 Mb |
| Document Language | English |
Pin Description (continued). PIN. NAME. FUNCTION. TQFN. TSSOP
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link to page 14 MAX25600 Synchronous High-Voltage Four-Switch Buck- Boost LED Controller
Pin Description (continued) PIN NAME FUNCTION TQFN TSSOP
Analog Dimming-Control Input. Connect an analog voltage from 0 to 1.3V for analog dimming of LED current. (V 20 24 ICTRL I ICTRL − 0.2V) LED = 5 × RCS_LED Bypass ICTRL to GND with at least a 10nF ceramic capacitor for noise filtering. Not needed if VREFI > 1.3V. 21 25 RT Oscillator Switching-Frequency Programming. Connect a resistor (RRT) from RT to SGND to set the internal clock frequency. fOSC(kHz) = 20000/RRT (kΩ). 22 26 IOUTV Analog Voltage Indication of LED Current. Bypass to SGND with a 0.1µF ceramic capacitor. Dimming Control Input. Connect PWM to an external 3.3V or 5V PWM signal for PWM dimming. For analog-voltage-controlled PWM dimming, connect PWM to VCC through a resistive voltage- divider with voltage between 0.2V and 3V. The dimming frequency is 200Hz under these 23 27 PWM conditions, and the duty cycle is (VPWM - 0.2)/2.8. Connect PWM to SGND to turn off the LEDs. Connect PWM to VCC for 100% duty cycle. Bypass PWM to SGND with a 0.1µF ceramic capacitor when using analog PWM. Undervoltage-Lockout (UVEN) Threshold/Enable Input. UVEN is a dual-function adjustable UVLO threshold input with an enable feature. Connect UVEN to VIN through a resistive voltage-divider to program the UVLO threshold. The UVLO threshold is given by 24 28 UVEN (R V UVEN1 + RUVEN2) UVLO = 1.23 RUVEN2 25 1 IN Positive Power-Supply Input. Bypass IN to PGND with at least a 1µF ceramic capacitor. 26 2 INP Positive Input for the Input Current Limit Negative Input for the Input Current Limit. Add an RC low-pass filter from INN to INP to 27 3 INN provide a filtered DC voltage from INP to INN. The resistor should be 100Ω and the capacitor should be 0.1µF. 28 4 BST1 High-Side Power Supply for High-Side Gate Drive for Buck Section. Connect a 0.1μF ceramic capacitor from BST1 to LX1. — — EP Exposed Pad. Connect EP to a large-area contiguous copper ground plane for effective power dissipation. Do not use as the main IC ground connection. EP must be connected to SGND. www.maximintegrated.com Maxim Integrated │
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Pin Description (continued) PIN NAME FUNCTION TQFN TSSOP
Analog Dimming-Control Input. Connect an analog voltage from 0 to 1.3V for analog dimming of LED current. (V 20 24 ICTRL I ICTRL − 0.2V) LED = 5 × RCS_LED Bypass ICTRL to GND with at least a 10nF ceramic capacitor for noise filtering. Not needed if VREFI > 1.3V. 21 25 RT Oscillator Switching-Frequency Programming. Connect a resistor (RRT) from RT to SGND to set the internal clock frequency. fOSC(kHz) = 20000/RRT (kΩ). 22 26 IOUTV Analog Voltage Indication of LED Current. Bypass to SGND with a 0.1µF ceramic capacitor. Dimming Control Input. Connect PWM to an external 3.3V or 5V PWM signal for PWM dimming. For analog-voltage-controlled PWM dimming, connect PWM to VCC through a resistive voltage- divider with voltage between 0.2V and 3V. The dimming frequency is 200Hz under these 23 27 PWM conditions, and the duty cycle is (VPWM - 0.2)/2.8. Connect PWM to SGND to turn off the LEDs. Connect PWM to VCC for 100% duty cycle. Bypass PWM to SGND with a 0.1µF ceramic capacitor when using analog PWM. Undervoltage-Lockout (UVEN) Threshold/Enable Input. UVEN is a dual-function adjustable UVLO threshold input with an enable feature. Connect UVEN to VIN through a resistive voltage-divider to program the UVLO threshold. The UVLO threshold is given by 24 28 UVEN (R V UVEN1 + RUVEN2) UVLO = 1.23 RUVEN2 25 1 IN Positive Power-Supply Input. Bypass IN to PGND with at least a 1µF ceramic capacitor. 26 2 INP Positive Input for the Input Current Limit Negative Input for the Input Current Limit. Add an RC low-pass filter from INN to INP to 27 3 INN provide a filtered DC voltage from INP to INN. The resistor should be 100Ω and the capacitor should be 0.1µF. 28 4 BST1 High-Side Power Supply for High-Side Gate Drive for Buck Section. Connect a 0.1μF ceramic capacitor from BST1 to LX1. — — EP Exposed Pad. Connect EP to a large-area contiguous copper ground plane for effective power dissipation. Do not use as the main IC ground connection. EP must be connected to SGND. www.maximintegrated.com Maxim Integrated │
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