Datasheet ADP5071 (Analog Devices) - 4
| Manufacturer | Analog Devices |
| Description | 2 A/1.2 A DC-to-DC Switching Regulator with Independent Positive and Negative Outputs |
| Pages / Page | 27 / 4 — ADP5071. Data Sheet. Parameter. Symbol. Min. Typ. Max. Unit. Test … |
| Revision | E |
| File Format / Size | PDF / 1.0 Mb |
| Document Language | English |
ADP5071. Data Sheet. Parameter. Symbol. Min. Typ. Max. Unit. Test Conditions/Comments
Model Line for this Datasheet
Text Version of Document
ADP5071 Data Sheet Parameter Symbol Min Typ Max Unit Test Conditions/Comments
INVERTING REGULATOR Reference Voltage VREF 1.60 V Reference Voltage Accuracy −0.5 +0.5 % TJ = 25°C −1.5 +1.5 % TJ = −40°C to +125°C Feedback Voltage VREF − VFB2 0.8 V Feedback Voltage Accuracy −0.5 +0.5 % TJ = 25°C −1.5 +1.5 % TJ = −40°C to +125°C Feedback Bias Current IFB2 0.1 µA Overvoltage Protection Threshold VOV2 0.74 V At FB2 pin after soft start has completed Load Regulation ∆(V 1 REF − VFB2)/ 0.0004 %/mA ILOAD2 = 5 mA to 75 mA ILOAD2 Line Regulation ∆(V 1 REF − VFB2)/ 0.003 %/V VPVIN2 = 2.85 V to 14.5 V, ILOAD2 = VPVIN2 25 mA EA Transconductance gM2 270 300 330 µA/V Power FET On Resistance RDS (ON) INVERTER 350 mΩ Power FET Maximum Drain Source Voltage VDS (MAX) INVERTER 39 V Current-Limit Threshold ILIM (INVERTER) 1200 1320 1440 mA Minimum On Time 60 ns Minimum Off Time 50 ns SOFT START Soft Start Timer for Boost and Inverting tSS 4 ms SS = open Regulators 32 ms SS resistor = 50 kΩ to GND Hiccup Time tHICCUP 8 × tSS ms THERMAL SHUTDOWN Threshold TSHDN 150 °C Hysteresis THYS 15 °C 1 ILOADx is the current through a resistive load connected across the output capacitor (where x is 1 for the boost regulator load and 2 for the inverting regulator load). Rev. E | Page 4 of 27 Document Outline Features Applications Typical Application Circuit General Description Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation PWM Mode PSM Mode Undervoltage Lockout (UVLO) Oscillator and Synchronization Internal Regulators Precision Enabling Soft Start Slew Rate Control Current-Limit Protection Overvoltage Protection Thermal Shutdown Start-Up Sequence Applications Information ADIsimPower Design Tool Component Selection Feedback Resistors Output Capacitors Input Capacitor VREG Capacitor VREF Capacitor Soft Start Resistor Diodes Inductor Selection for the Boost Regulator Inductor Selection for the Inverting Regulator Loop Compensation Boost Regulator Inverting Regulator Common Applications Super Low Noise With Optional LDOs SEPIC Step-Up/Step-Down Operation Layout Considerations Outline Dimensions Ordering Guide
INVERTING REGULATOR Reference Voltage VREF 1.60 V Reference Voltage Accuracy −0.5 +0.5 % TJ = 25°C −1.5 +1.5 % TJ = −40°C to +125°C Feedback Voltage VREF − VFB2 0.8 V Feedback Voltage Accuracy −0.5 +0.5 % TJ = 25°C −1.5 +1.5 % TJ = −40°C to +125°C Feedback Bias Current IFB2 0.1 µA Overvoltage Protection Threshold VOV2 0.74 V At FB2 pin after soft start has completed Load Regulation ∆(V 1 REF − VFB2)/ 0.0004 %/mA ILOAD2 = 5 mA to 75 mA ILOAD2 Line Regulation ∆(V 1 REF − VFB2)/ 0.003 %/V VPVIN2 = 2.85 V to 14.5 V, ILOAD2 = VPVIN2 25 mA EA Transconductance gM2 270 300 330 µA/V Power FET On Resistance RDS (ON) INVERTER 350 mΩ Power FET Maximum Drain Source Voltage VDS (MAX) INVERTER 39 V Current-Limit Threshold ILIM (INVERTER) 1200 1320 1440 mA Minimum On Time 60 ns Minimum Off Time 50 ns SOFT START Soft Start Timer for Boost and Inverting tSS 4 ms SS = open Regulators 32 ms SS resistor = 50 kΩ to GND Hiccup Time tHICCUP 8 × tSS ms THERMAL SHUTDOWN Threshold TSHDN 150 °C Hysteresis THYS 15 °C 1 ILOADx is the current through a resistive load connected across the output capacitor (where x is 1 for the boost regulator load and 2 for the inverting regulator load). Rev. E | Page 4 of 27 Document Outline Features Applications Typical Application Circuit General Description Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation PWM Mode PSM Mode Undervoltage Lockout (UVLO) Oscillator and Synchronization Internal Regulators Precision Enabling Soft Start Slew Rate Control Current-Limit Protection Overvoltage Protection Thermal Shutdown Start-Up Sequence Applications Information ADIsimPower Design Tool Component Selection Feedback Resistors Output Capacitors Input Capacitor VREG Capacitor VREF Capacitor Soft Start Resistor Diodes Inductor Selection for the Boost Regulator Inductor Selection for the Inverting Regulator Loop Compensation Boost Regulator Inverting Regulator Common Applications Super Low Noise With Optional LDOs SEPIC Step-Up/Step-Down Operation Layout Considerations Outline Dimensions Ordering Guide
