Datasheet ADL5310 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | 120 dB RANGE (3 nA TO 3 mA) Dual Logarithmic Converter |
| Pages / Page | 20 / 10 — ADL5310. Data Sheet. 700. 450. 400. 600. 350. 500. 300. 250. COUNT. 200. … |
| Revision | B |
| File Format / Size | PDF / 577 Kb |
| Document Language | English |
ADL5310. Data Sheet. 700. 450. 400. 600. 350. 500. 300. 250. COUNT. 200. 150. 100. 190. 195. 205. 210. SLOPE (mV/dec). SLOPE MISMATCH (mV/dec). –300. –200. –100
Model Line for this Datasheet
Text Version of Document
ADL5310 Data Sheet 700 450 400 600 350 500 300 400 250 COUNT 300 COUNT 200 150 200 100 100 50 0 0 190 195 200 205 210 –9 –6 –3 0 3 6 9 SLOPE (mV/dec) SLOPE MISMATCH (mV/dec)
04415-0-027 04415-0-030 Figure 27. Distribution of Logarithmic Slope Figure 30. Distribution of Channel-to-Channel Slope Mismatch (VY1 – VY2)
600 500 500 400 400 300 300 COUNT COUNT 200 200 100 100 0 0 100 200 300 400 500 –300 –200 –100 0 100 200 300 INTERCEPT (pA) INTERCEPT MISMATCH (pA)
04415-0-028 04415-0-031 Figure 28. Distribution of Logarithmic Intercept Figure 31. Distribution of Channel-to-Channel Intercept Mismatch (IZ1 – IZ2)
700 500 600 400 500 300 400 COUNT 300 COUNT 200 200 100 100 0 0 2.46 2.48 2.50 2.52 2.54 –9 –6 –3 0 3 6 9 VREF VOLTAGE (V) V
04415-0-029
INPT – VSUM VOLTAGE (mV)
04415-0-032 Figure 29. Distribution of VREF (RL = 100 kΩ) Figure 32. Distribution of Offset Voltage (VINPT – VSUM) Rev. B | Page 10 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS GENERAL STRUCTURE THEORY MANAGING INTERCEPT AND SLOPE RESPONSE TIME AND NOISE CONSIDERATIONS APPLICATIONS INFORMATION CALIBRATION MINIMIZING CROSSTALK RELATIVE AND ABSOLUTE POWER MEASUREMENTS CHARACTERIZATION METHODS EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
04415-0-027 04415-0-030 Figure 27. Distribution of Logarithmic Slope Figure 30. Distribution of Channel-to-Channel Slope Mismatch (VY1 – VY2)
600 500 500 400 400 300 300 COUNT COUNT 200 200 100 100 0 0 100 200 300 400 500 –300 –200 –100 0 100 200 300 INTERCEPT (pA) INTERCEPT MISMATCH (pA)
04415-0-028 04415-0-031 Figure 28. Distribution of Logarithmic Intercept Figure 31. Distribution of Channel-to-Channel Intercept Mismatch (IZ1 – IZ2)
700 500 600 400 500 300 400 COUNT 300 COUNT 200 200 100 100 0 0 2.46 2.48 2.50 2.52 2.54 –9 –6 –3 0 3 6 9 VREF VOLTAGE (V) V
04415-0-029
INPT – VSUM VOLTAGE (mV)
04415-0-032 Figure 29. Distribution of VREF (RL = 100 kΩ) Figure 32. Distribution of Offset Voltage (VINPT – VSUM) Rev. B | Page 10 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS GENERAL STRUCTURE THEORY MANAGING INTERCEPT AND SLOPE RESPONSE TIME AND NOISE CONSIDERATIONS APPLICATIONS INFORMATION CALIBRATION MINIMIZING CROSSTALK RELATIVE AND ABSOLUTE POWER MEASUREMENTS CHARACTERIZATION METHODS EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
