Datasheet TB67S158FTG (Toshiba) - 3
| Manufacturer | Toshiba |
| Description | Bi-CD Integrated Circuit Silicon Monolithic |
| Pages / Page | 32 / 3 — 3. Pin name/assignment MODE1 (Full parallel mode). TB67S158FTG |
| File Format / Size | PDF / 1.3 Mb |
| Document Language | English |
3. Pin name/assignment MODE1 (Full parallel mode). TB67S158FTG
Model Line for this Datasheet
Text Version of Document
TB67S158FTG
3. Pin name/assignment MODE1 (Full parallel mode)
(Top View) 1 0 E E D N D D O O RR NC LG E NC NC NC VM NC NC NC M M 36 35 34 33 32 31 30 29 28 27 26 25 VCOM_CD 37 24 VCOM_AB OUT_D+ 38 23 OUT_B+ OUT_D+ 39 22 OUT_B+ OUT_D- 40 21 OUT_B- OUT_D- 41 20 OUT_B- PGND_CD 42 19 PGND_AB
TB67S158FTG
PGND_CD 43 18 PGND_AB OUT_C- 44 17 OUT_A- OUT_C- 45 16 OUT_A- OUT_C+ 46 15 OUT_A+ OUT_C+ 47 14 OUT_A+ NC 48 13 NC 1 2 3 4 5 6 7 8 9 10 11 12 D1 D2 C1 1 2 1 2 NC C2 A NC A B B NC NC IN_ IN_ IN_ IN_ IN_ IN_ IN_ IN_ (*) Please mount the four corner pins of the QFN package and the exposed pad to the GND area of the PCB. 3 2015-3-3
3. Pin name/assignment MODE1 (Full parallel mode)
(Top View) 1 0 E E D N D D O O RR NC LG E NC NC NC VM NC NC NC M M 36 35 34 33 32 31 30 29 28 27 26 25 VCOM_CD 37 24 VCOM_AB OUT_D+ 38 23 OUT_B+ OUT_D+ 39 22 OUT_B+ OUT_D- 40 21 OUT_B- OUT_D- 41 20 OUT_B- PGND_CD 42 19 PGND_AB
TB67S158FTG
PGND_CD 43 18 PGND_AB OUT_C- 44 17 OUT_A- OUT_C- 45 16 OUT_A- OUT_C+ 46 15 OUT_A+ OUT_C+ 47 14 OUT_A+ NC 48 13 NC 1 2 3 4 5 6 7 8 9 10 11 12 D1 D2 C1 1 2 1 2 NC C2 A NC A B B NC NC IN_ IN_ IN_ IN_ IN_ IN_ IN_ IN_ (*) Please mount the four corner pins of the QFN package and the exposed pad to the GND area of the PCB. 3 2015-3-3
