Datasheet TB9045FNG-150 (Toshiba) - 3

ManufacturerToshiba
DescriptionDCDC Convertor & Multi Output Regulator
Pages / Page45 / 3 — 3. Pin description. Pin. No. I/O. Function. Configuration. Pull-up/down. …
File Format / SizePDF / 767 Kb
Document LanguageEnglish

3. Pin description. Pin. No. I/O. Function. Configuration. Pull-up/down. Remarks. name

3 Pin description Pin No I/O Function Configuration Pull-up/down Remarks name

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TB9045FNG-150
3. Pin description Pin No. I/O Function Configuration Pull-up/down Remarks name
Pull-up power supply of MCU I/F pin and IO buffer Connect it to
1
LDOIO I ― ― ― connection pin LDO1. Leave this pin
2
TEST1 I Test pin BIP ― ― open. Connect it to
3
VDDL I Logic power input pin ― ― ― VDD.
4
VDD O VDD power output pin for internal circuit DMOS ― ― ― Connection to AGND in buck- boost mode,
5
BSTOFF I Switching pin between buck-boost mode/buck mode CMOS PD 50kΩ connection to VDD in buck mode.
6
DC1Css I/O DCDC1 soft start time setting pin CMOS ― ― ―
7
MCU_IN I Wake-up signal input pin from microcomputer CMOS PD 100kΩ ―
8
SDIN I SPI serial data input pin CMOS PD 50kΩ ―
9
SDOUT O SPI serial data output pin CMOS ― ― ―
10
SCLK I SPI clock input pin CMOS PD 50kΩ ― It is pulled up to
11
NSCS I SPI chip select pin CMOS PU 50kΩ LDOIO inside IC. Leave this pin
12
NC ― Non connection pin ― ― ― open.
13
TR1 O Tracker output 1 DMOS ― ― ―
14
TR2 O Tracker output 2 DMOS ― ― ―
15
TR3 O Tracker output 3 DMOS ― ― ―
16
AGND1 - GND ― ― ― ― It is pulled up to
17
NRST1 O Reset signal output pin 1 (for MCU) O.D. PU 4.7kΩ LDOIO inside IC.
18
OSC O Clock output CMOS ― ― ― It is pulled up to
19
NDIAG O Output pin for flag signal notifying error information O.D. PU 4.7kΩ LDOIO inside IC. Connect it to
20
TEST2 I Test pin CMOS PD 50kΩ GND.
21
CK I Watchdog clock input pin CMOS PD 50kΩ ―
22
TC I/O Time setting capacitor pin for reset timer CMOS ― ― ― Leave this pin
23
TEST3 O Test pin CMOS ― ― open. Function turned on at L input and
24
WS I Switching pin between ON/OFF of watchdog function CMOS PD 50kΩ function turned off at H input It is pulled up to
25
NRST2 O Reset signal output pin 2 (for driver) O.D. PU 4.7kΩ LDOIO inside IC. Leave this pin
26
TEST4 O Test pin CMOS ― ― open.
27
DC2Css I/O DCDC2 soft start time setting pin CMOS ― ― ―
28
DC2FBs I DCDC2 output voltage feed-back detection SENSE pin CMOS ― ― ―
29
DC2FB I DCDC2 output voltage feed-back detection pin CMOS ― ― ― Connect it to
30
PGND2 - DCDC2 GND pin ― ― ― GND.
31
DC2SW O DCDC2 switching output pin DMOS ― ― ― Leave this pin
32
NC ― Non connection pin ― ― ― open. © 2015-2019 2018-06-04 Toshiba Electronic Devices & Storage Corporation 3
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