Datasheet LTM4678 (Analog Devices) - 4
| Manufacturer | Analog Devices |
| Description | Dual 25A or Single 50A µModule Regulator with Digital Power System Management |
| Pages / Page | 124 / 4 — ABSOLUTE MAXIMUM RATINGS. PIN CONFIGURATION. (Note 1) Terminal Voltages:. … |
| Revision | A |
| File Format / Size | PDF / 6.6 Mb |
| Document Language | English |
ABSOLUTE MAXIMUM RATINGS. PIN CONFIGURATION. (Note 1) Terminal Voltages:. Temperatures. ORDER INFORMATION. PART MARKING*. PACKAGE
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LTM4678
ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) Terminal Voltages:
TOP VIEW V + V – V + − OSNS1 OSNS1 INn (Note 4), SVIN, IIN , IIN .. –0.3V to 18V A (SV + + − SW1 GND VOUT1 IN – IIN ), (IIN – IIN ) ... –0.3V to 0.3V B SW0, SW1 .. −1V to 18V, −5V to 18V Transient V V OUT1 TRIM0_ COMP1b WP CFG V C OUTn, INTVCC, EXTVCC ... –0.3V to 6V SHARE_ V + + SV GND IN TSNS1b PGOOD1 COMP1a CLK VDD25 OSNS0 , VOSNS1 ... –0.3V to 6V D V − − GND F VTRIM1_ V VOUT1_ OSNS0 , VOSNS1 .. –0.3V to 0.3V INTV SWPH_ OUT0_ CC VDD33 CFG CFG CFG CFG RUNn, SDA, SCL, ALERT ... –0.3V to 5.5V E VIN1 EXTV FSWPH_CFG, VOUT0,1_CFG, CC RUN1 ASEL F VTRIM0,1_CFG, ASEL ... –0.3V to 2.75V GND SGND FAULT1 RUN0 G FAULTn, SYNC, SHARE_CLK, WP, VIN0 COMP0b SDA ALERT FAULT0 PGOOD0, PGOOD1 ... −0.3V to 3.6V H COMPna, COMPnb, .. –0.3V to 2.7V I + IN PGOOD0 TSNS0b COMP0a TSNS1a TSNS0a SCL J TSNS0a, TSNS1a .. –0.3V to 2.2V I – GND IN SYNC TSNS0b, TSNS1b .. –0.3V to 0.8V K GND VOUT0
Temperatures
L V Internal Operating Temperature Range SW0 OUT0 V + – OSNS0 VOSNS0 M (Notes 2, 13, 17, 18) ... –40°C to 125°C 1 2 3 4 5 6 7 8 9 10 11 12 Storage Temperature Range .. –55°C to 125°C BGA PACKAGE Peak Solder Reflow Package Body Temperature ... 245°C 144-LEAD (16mm × 16mm × 5.86mm) TJMAX = 125°C, θJCtop = 2.5°C/W, θJCbottom = 2°C/W, θBA = 7°C/W, θJA = 9°C/W (Not Recommended for Upside Down Reflow) θ VALUES DETERMINED PER DEMOBOARD WEIGHT = 3.2 GRAMS
ORDER INFORMATION PART MARKING* PACKAGE MSL TEMPERATURE RANGE PART NUMBER PAD OR BALL FINISH DEVICE FINISH CODE TYPE RATING (See Note 2)
LTM4678EY#PBF LTM4678Y SAC305 (RoHS) e1 LTM4678IY#PBF LTM4678Y BGA 4 –40°C to 125°C LTM4678IY SnPb (63/37) LTM4678Y e0 Consult Marketing for parts specified with wider operating temperature ranges. *Device temperature grade is indicated by a label on the shipping container. Pad or ball finish code is per IPC/JEDEC J-STD-609. Rev. A 4 For more information www.analog.com Document Outline Features Applications Typical Application Description Table of Contents Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Functional Diagram Test Circuits Operation Power Module Introduction Power Module Overview, Major Features EEPROM with ECC Power-Up and Initialization Soft-Start Time-Based Sequencing Voltage-Based Sequencing Shutdown Light-Load Current Operation Switching Frequency and Phase PWM Loop Compensation Output Voltage Sensing INTVCC/EXTVCC Power Output Current Sensing and Sub Milliohm DCR Current Sensing Input Current Sensing PolyPhase Load Sharing External/Internal Temperature Sense RCONFIG (Resistor Configuration) Pins VOUTn _CFG Pin Strapping Look-Up Table for the LTM4678’s Output Voltage, Coarse Setting (Not Applicable if MFR_CONFIG_ALL[6] = 1b) VTRIMn_CFG Pin Strapping Look-Up Table for the LTM4678’s Output Voltage, Fine Adjustment Setting (Not Applicable if MFR_CONFIG_ALL[6] = 1b) FSWPH_CFG Pin Strapping Look-Up Table to Set the LTM4678’s Switching Frequency and Channel Phase-Interleaving Angle (Not Applicable if MFR_CONFIG_ALL[6] = 1b) ASEL Pin Strapping Look-Up Table to Set the LTM4678’s Slave Address (Applicable Regardless of MFR_CONFIG_ALL[6] Setting) LTM4678 MFR_ADDRESS Command Examples Expressed in 7- and 8-Bit Addressing Fault Detection and Handling Status Registers and ALERT Masking Mapping Faults to FAULT Pins Power Good Pins CRC Protection Serial Interface Communication Protection Device Addressing Responses to VOUT and IIN/IOUT Faults Output Overvoltage Fault Response Output Undervoltage Response Peak Output Overcurrent Fault Response Responses to Timing Faults Responses to VIN OV Faults Responses to OT/UT Faults Internal Overtemperature Fault Response External Overtemperature and Undertemperature Fault Response Responses to Input Overcurrent and Output Undercurrent Faults Responses to External Faults Fault Logging Bus Timeout Protection Similarity Between PMBus, SMBus and I2C 2-Wire Interface PMBus Serial Digital Interface Abbreviations of Supported Data Formats Figure 7 to Figure 24 PMBus Protocols PMBus Command Summary PMBus Commands PMBus Commands Summary (Note: The Data Format Abbreviations are Detailed in Table 8) Data Format Abbreviations Applications Information VIN to VOUT Step-Down Ratios Input Capacitors Output Capacitors Light Load Current Operation Switching Frequency and Phase Recommended Switching Frequency for Various VIN-to-VOUT Step-Down Scenarios Output Current Limit Programming Minimum On-Time Considerations Variable Delay Time, Soft-Start and Output Voltage Ramping Digital Servo Mode Soft Off (Sequenced Off) Undervoltage Lockout Fault Detection and Handling Open-Drain Pins Phase-Locked Loop and Frequency Synchronization Input Current Sense Amplifier Programmable Loop Compensation Checking Transient Response PolyPhase Configuration Connecting The USB to I2C/SMBus/PMBus Controller to the LTM4678 In System LTpowerPlay: An Interactive GUI for Digital Power PMBus Communication and Command Processing Thermal Considerations and Output Current Derating Table 10 thru Table 11: Output Current Derating 0.9V Output 1.8V Output Channel Output Voltage vs Component Selection, 0A to 12.5A/μs Load Step Output Capacitor-GRM32ER60G337ME05L, 330μF, 4V, X5R, Murata Low VOUT Range for VOUT ≤ 2.5V High VOUT Range for 2.5V ≤ VOUT ILIMIT Range = High Channel Output Voltage vs Component Selection, 0A to 12.5A/μs Load Step Low VOUT Range for VOUT ≤ 2.5V High VOUT Range for 2.5V ≤ VOUT ILIMIT Range = High Dual Phase Single Output – Ceramic and Poscap Output Capacitors Applications Information-Derating Curves EMI Performance Safety Considerations Layout Checklist/Example Typical Applications PMBus Command Details Addressing and Write Protect General Configuration Commands On/Off/Margin PWM Configuration Voltage Input Voltage and Limits Output Voltage and Limits Output Current and Limits Input Current and Limits Temperature Power Stage DCR Temperature Calibration Timing Timing—On Sequence/Ramp Timing—Off Sequence/Ramp Precondition for Restart Fault Response Fault Responses All Faults Fault Responses Input Voltage Fault Responses Output Voltage VOUT_OV_FAULT_RESPONSE Data Byte Contents VOUT_UV_FAULT_RESPONSE Data Byte Contents Fault Responses Output Current OUT_OC_FAULT_RESPONSE Data Byte Contents Fault Responses IC Temperature Data Byte Contents MFR_OT_FAULT_RESPONSE Fault Responses External Temperature Fault Sharing Fault Sharing Propagation FAULTn Propagate Fault Configuration Fault Sharing Response Scratchpad Identification Fault Warning and Status Telemetry NVM Memory Commands Store/Restore Fault Logging Fault Logging Explanation of Position_Fault Values Block Memory Write/Read Package Description LTM4678 BGA Pinout Revision History Package Photograph Design Resources Related Parts
ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) Terminal Voltages:
TOP VIEW V + V – V + − OSNS1 OSNS1 INn (Note 4), SVIN, IIN , IIN .. –0.3V to 18V A (SV + + − SW1 GND VOUT1 IN – IIN ), (IIN – IIN ) ... –0.3V to 0.3V B SW0, SW1 .. −1V to 18V, −5V to 18V Transient V V OUT1 TRIM0_ COMP1b WP CFG V C OUTn, INTVCC, EXTVCC ... –0.3V to 6V SHARE_ V + + SV GND IN TSNS1b PGOOD1 COMP1a CLK VDD25 OSNS0 , VOSNS1 ... –0.3V to 6V D V − − GND F VTRIM1_ V VOUT1_ OSNS0 , VOSNS1 .. –0.3V to 0.3V INTV SWPH_ OUT0_ CC VDD33 CFG CFG CFG CFG RUNn, SDA, SCL, ALERT ... –0.3V to 5.5V E VIN1 EXTV FSWPH_CFG, VOUT0,1_CFG, CC RUN1 ASEL F VTRIM0,1_CFG, ASEL ... –0.3V to 2.75V GND SGND FAULT1 RUN0 G FAULTn, SYNC, SHARE_CLK, WP, VIN0 COMP0b SDA ALERT FAULT0 PGOOD0, PGOOD1 ... −0.3V to 3.6V H COMPna, COMPnb, .. –0.3V to 2.7V I + IN PGOOD0 TSNS0b COMP0a TSNS1a TSNS0a SCL J TSNS0a, TSNS1a .. –0.3V to 2.2V I – GND IN SYNC TSNS0b, TSNS1b .. –0.3V to 0.8V K GND VOUT0
Temperatures
L V Internal Operating Temperature Range SW0 OUT0 V + – OSNS0 VOSNS0 M (Notes 2, 13, 17, 18) ... –40°C to 125°C 1 2 3 4 5 6 7 8 9 10 11 12 Storage Temperature Range .. –55°C to 125°C BGA PACKAGE Peak Solder Reflow Package Body Temperature ... 245°C 144-LEAD (16mm × 16mm × 5.86mm) TJMAX = 125°C, θJCtop = 2.5°C/W, θJCbottom = 2°C/W, θBA = 7°C/W, θJA = 9°C/W (Not Recommended for Upside Down Reflow) θ VALUES DETERMINED PER DEMOBOARD WEIGHT = 3.2 GRAMS
ORDER INFORMATION PART MARKING* PACKAGE MSL TEMPERATURE RANGE PART NUMBER PAD OR BALL FINISH DEVICE FINISH CODE TYPE RATING (See Note 2)
LTM4678EY#PBF LTM4678Y SAC305 (RoHS) e1 LTM4678IY#PBF LTM4678Y BGA 4 –40°C to 125°C LTM4678IY SnPb (63/37) LTM4678Y e0 Consult Marketing for parts specified with wider operating temperature ranges. *Device temperature grade is indicated by a label on the shipping container. Pad or ball finish code is per IPC/JEDEC J-STD-609. Rev. A 4 For more information www.analog.com Document Outline Features Applications Typical Application Description Table of Contents Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Functional Diagram Test Circuits Operation Power Module Introduction Power Module Overview, Major Features EEPROM with ECC Power-Up and Initialization Soft-Start Time-Based Sequencing Voltage-Based Sequencing Shutdown Light-Load Current Operation Switching Frequency and Phase PWM Loop Compensation Output Voltage Sensing INTVCC/EXTVCC Power Output Current Sensing and Sub Milliohm DCR Current Sensing Input Current Sensing PolyPhase Load Sharing External/Internal Temperature Sense RCONFIG (Resistor Configuration) Pins VOUTn _CFG Pin Strapping Look-Up Table for the LTM4678’s Output Voltage, Coarse Setting (Not Applicable if MFR_CONFIG_ALL[6] = 1b) VTRIMn_CFG Pin Strapping Look-Up Table for the LTM4678’s Output Voltage, Fine Adjustment Setting (Not Applicable if MFR_CONFIG_ALL[6] = 1b) FSWPH_CFG Pin Strapping Look-Up Table to Set the LTM4678’s Switching Frequency and Channel Phase-Interleaving Angle (Not Applicable if MFR_CONFIG_ALL[6] = 1b) ASEL Pin Strapping Look-Up Table to Set the LTM4678’s Slave Address (Applicable Regardless of MFR_CONFIG_ALL[6] Setting) LTM4678 MFR_ADDRESS Command Examples Expressed in 7- and 8-Bit Addressing Fault Detection and Handling Status Registers and ALERT Masking Mapping Faults to FAULT Pins Power Good Pins CRC Protection Serial Interface Communication Protection Device Addressing Responses to VOUT and IIN/IOUT Faults Output Overvoltage Fault Response Output Undervoltage Response Peak Output Overcurrent Fault Response Responses to Timing Faults Responses to VIN OV Faults Responses to OT/UT Faults Internal Overtemperature Fault Response External Overtemperature and Undertemperature Fault Response Responses to Input Overcurrent and Output Undercurrent Faults Responses to External Faults Fault Logging Bus Timeout Protection Similarity Between PMBus, SMBus and I2C 2-Wire Interface PMBus Serial Digital Interface Abbreviations of Supported Data Formats Figure 7 to Figure 24 PMBus Protocols PMBus Command Summary PMBus Commands PMBus Commands Summary (Note: The Data Format Abbreviations are Detailed in Table 8) Data Format Abbreviations Applications Information VIN to VOUT Step-Down Ratios Input Capacitors Output Capacitors Light Load Current Operation Switching Frequency and Phase Recommended Switching Frequency for Various VIN-to-VOUT Step-Down Scenarios Output Current Limit Programming Minimum On-Time Considerations Variable Delay Time, Soft-Start and Output Voltage Ramping Digital Servo Mode Soft Off (Sequenced Off) Undervoltage Lockout Fault Detection and Handling Open-Drain Pins Phase-Locked Loop and Frequency Synchronization Input Current Sense Amplifier Programmable Loop Compensation Checking Transient Response PolyPhase Configuration Connecting The USB to I2C/SMBus/PMBus Controller to the LTM4678 In System LTpowerPlay: An Interactive GUI for Digital Power PMBus Communication and Command Processing Thermal Considerations and Output Current Derating Table 10 thru Table 11: Output Current Derating 0.9V Output 1.8V Output Channel Output Voltage vs Component Selection, 0A to 12.5A/μs Load Step Output Capacitor-GRM32ER60G337ME05L, 330μF, 4V, X5R, Murata Low VOUT Range for VOUT ≤ 2.5V High VOUT Range for 2.5V ≤ VOUT ILIMIT Range = High Channel Output Voltage vs Component Selection, 0A to 12.5A/μs Load Step Low VOUT Range for VOUT ≤ 2.5V High VOUT Range for 2.5V ≤ VOUT ILIMIT Range = High Dual Phase Single Output – Ceramic and Poscap Output Capacitors Applications Information-Derating Curves EMI Performance Safety Considerations Layout Checklist/Example Typical Applications PMBus Command Details Addressing and Write Protect General Configuration Commands On/Off/Margin PWM Configuration Voltage Input Voltage and Limits Output Voltage and Limits Output Current and Limits Input Current and Limits Temperature Power Stage DCR Temperature Calibration Timing Timing—On Sequence/Ramp Timing—Off Sequence/Ramp Precondition for Restart Fault Response Fault Responses All Faults Fault Responses Input Voltage Fault Responses Output Voltage VOUT_OV_FAULT_RESPONSE Data Byte Contents VOUT_UV_FAULT_RESPONSE Data Byte Contents Fault Responses Output Current OUT_OC_FAULT_RESPONSE Data Byte Contents Fault Responses IC Temperature Data Byte Contents MFR_OT_FAULT_RESPONSE Fault Responses External Temperature Fault Sharing Fault Sharing Propagation FAULTn Propagate Fault Configuration Fault Sharing Response Scratchpad Identification Fault Warning and Status Telemetry NVM Memory Commands Store/Restore Fault Logging Fault Logging Explanation of Position_Fault Values Block Memory Write/Read Package Description LTM4678 BGA Pinout Revision History Package Photograph Design Resources Related Parts
