Datasheet AD8232 (Analog Devices) - 29
| Manufacturer | Analog Devices |
| Description | Single-Lead, Heart Rate Monitor Front End |
| Pages / Page | 32 / 29 — Data Sheet. AD8232. +VS. 4.7µF. 10MΩ. HPDRIVE. HPSENSE. ADP150x-2.8. S = … |
| Revision | D |
| File Format / Size | PDF / 686 Kb |
| Document Language | English |
Data Sheet. AD8232. +VS. 4.7µF. 10MΩ. HPDRIVE. HPSENSE. ADP150x-2.8. S = +2.8V. 180kΩ. VOUT. VIN. +IN. IAOUT. 1µF. GND. BATT. –IN. REFIN. ELECTRODE. 0.1µF
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Text Version of Document
Data Sheet AD8232 +VS 4.7µF 10MΩ HPDRIVE HPSENSE ADP150x-2.8 +V 10MΩ S = +2.8V 180kΩ 10MΩ VOUT VIN LA +IN IAOUT 1µF GND 1µF +V V S 180kΩ BATT RA –IN REFIN ELECTRODE 10MΩ 0.1µF INTERFACE 4.7µF +V RLDFB S 10MΩ 1nF 0.1µF 360kΩ RL RLD GND AD8232 SW FR +VS 1MΩ 1MΩ OPAMP+ AC/DC ADXL346 ADuCM360 100kΩ 6.8nF P0.6/IRQ2 INT2 REFOUT SDN P1.2 VS +VS 332kΩ P1.7/CS0 CS OPAMP– LO+ 2.7nF P1.1 VDDIO 1MΩ P1.6/MOSI0 SDO/ALT_ADD 1µF OUT LO– P1.0 P1.4/MISO0 SDA/SDI/SDIO GND P1.SCLK0 SCL/SCLK AIN0 REG_DVDD AIN1 0.47µF 0.47µF AVDD_REG +VS VREF+ 4.7µF AVDD P0.3/CS1 CS TO HOST, IOVDD P0.0/MISO1 TX MEMORY VREF– P0.2/MOSI1 RX OR DISPLAY
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GND P0.1/SCLK1 CLK
10866- Figure 68. Low Power Portable Cardiac Monitor Rev. D | Page 29 of 32 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Instrumentation Amplifier Performance Curves Operational Amplifier Performance Curves Right Leg Drive (RLD) Amplifier Performance Curves Reference Buffer Performance Curves System Performance Curves Theory of Operation Architecture Overview Instrumentation Amplifier Operational Amplifier Right Leg Drive Amplifier Reference Buffer Fast Restore Circuit Leads Off Detection DC Leads Off Detection AC Leads Off Detection Standby Operation Input Protection Radio Frequency Interference (RFI) Power Supply Regulation and Bypassing Input Referred Offsets Layout Recommendations Applications Information Eliminating Electrode Offsets High-Pass Filtering Two-Pole High-Pass Filter Additional High-Pass Filtering Options Low-Pass Filtering and Gain Driving Analog-to-Digital Converters Driven Electrode Application Circuits Heart Rate Measurement Next to the Heart Exercise Application: Heart Rate Measured at the Hands Cardiac Monitor Configuration Portable Cardiac Monitor with Elimination of Motion Artifacts Packaging and Ordering Information Outline Dimensions Ordering Guide
163
GND P0.1/SCLK1 CLK
10866- Figure 68. Low Power Portable Cardiac Monitor Rev. D | Page 29 of 32 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Instrumentation Amplifier Performance Curves Operational Amplifier Performance Curves Right Leg Drive (RLD) Amplifier Performance Curves Reference Buffer Performance Curves System Performance Curves Theory of Operation Architecture Overview Instrumentation Amplifier Operational Amplifier Right Leg Drive Amplifier Reference Buffer Fast Restore Circuit Leads Off Detection DC Leads Off Detection AC Leads Off Detection Standby Operation Input Protection Radio Frequency Interference (RFI) Power Supply Regulation and Bypassing Input Referred Offsets Layout Recommendations Applications Information Eliminating Electrode Offsets High-Pass Filtering Two-Pole High-Pass Filter Additional High-Pass Filtering Options Low-Pass Filtering and Gain Driving Analog-to-Digital Converters Driven Electrode Application Circuits Heart Rate Measurement Next to the Heart Exercise Application: Heart Rate Measured at the Hands Cardiac Monitor Configuration Portable Cardiac Monitor with Elimination of Motion Artifacts Packaging and Ordering Information Outline Dimensions Ordering Guide