Datasheet LT8641 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | 65V, 3.5A Synchronous Step-Down Silent Switcher with 2.5μA Quiescent Current |
| Pages / Page | 26 / 10 — PIN FUNCTIONS BIAS (Pin 1):. GND2 (10, 11):. INTVCC (Pin 2):. VIN2 (Pin … |
| Revision | C |
| File Format / Size | PDF / 3.4 Mb |
| Document Language | English |
PIN FUNCTIONS BIAS (Pin 1):. GND2 (10, 11):. INTVCC (Pin 2):. VIN2 (Pin 13):. BST (Pin 3):. EN/UV (Pin 14):. IN1 (Pin 4):
Model Line for this Datasheet
Text Version of Document
LT8641
PIN FUNCTIONS BIAS (Pin 1):
The internal regulator will draw current from
GND2 (10, 11):
Power Switch Ground. These pins are the BIAS instead of VIN when BIAS is tied to a voltage higher return path of the internal bottom side power switch and than 3.1V. For output voltages of 3.3V to 25V this pin must be tied together. Place the negative terminal of the should be tied to VOUT. If this pin is tied to a supply other input capacitor as close to the GND2 pins as possible. than VOUT use a 1µF local bypass capacitor on this pin. If Also be sure to tie GND2 to the ground plane. See the no supply is available, tie to GND. Applications Information section for sample layout.
INTVCC (Pin 2):
Internal 3.4V Regulator Bypass Pin. The
VIN2 (Pin 13):
The LT8641 requires two 1µF small input internal power drivers and control circuits are powered bypass capacitors. One 1µF capacitor should be placed from this voltage. INTVCC maximum output current is between VIN1 and GND1. A second 1µF capacitor should 20mA. Do not load the INTVCC pin with external circuitry. be placed between VIN2 and GND2. These capacitors INTVCC current will be supplied from BIAS if BIAS > must be placed as close as possible to the LT8641. A 3.1V, otherwise current will be drawn from VIN. Voltage third larger capacitor of 2.2µF or more should be placed on INTVCC will vary between 2.8V and 3.4V when BIAS close to the LT8641 with the positive terminal connected is between 3.0V and 3.6V. Decouple this pin to power to VIN1 and VIN2, and the negative terminal connected ground with at least a 1μF low ESR ceramic capacitor to ground. See the Applications Information section for placed close to the IC. sample layout.
BST (Pin 3):
This pin is used to provide a drive voltage,
EN/UV (Pin 14):
The LT8641 is shut down when this pin higher than the input voltage, to the topside power switch. is low and active when this pin is high. The hysteretic Place a 0.1µF boost capacitor as close as possible to the threshold voltage is 1.00V going up and 0.96V going IC. down. Tie to VIN if the shutdown feature is not used. An
V
external resistor divider from VIN can be used to program
IN1 (Pin 4):
The LT8641 requires two 1µF small input bypass capacitors. One 1µF capacitor should be placed a VIN threshold below which the LT8641 will shut down. between VIN1 and GND1. A second 1µF capacitor should
RT (Pin 15):
A resistor is tied between RT and ground to be placed between VIN2 and GND2. These capacitors must set the switching frequency. be placed as close as possible to the LT8641. A third
TR/SS (Pin 16):
Output Tracking and Soft-Start Pin. This larger capacitor of 2.2µF or more should be placed close pin allows user control of output voltage ramp rate during to the LT8641 with the positive terminal connected to VIN1 start-up. A TR/SS voltage below 0.8V forces the LT8641 and VIN2, and the negative terminal connected to ground. to regulate the FB pin to equal the TR/SS pin voltage. See applications section for sample layout. When TR/SS is above 0.8V, the tracking function is dis-
GND1 (6, 7):
Power Switch Ground. These pins are the abled and the internal reference resumes control of the return path of the internal bottom side power switch and error amplifier. An internal 1.9μA pull-up current from must be tied together. Place the negative terminal of the INTVCC on this pin allows a capacitor to program output input capacitor as close to the GND1 pins as possible. voltage slew rate. This pin is pulled to ground with an Also be sure to tie GND1 to the ground plane. See the internal 200Ω MOSFET during shutdown and fault condi- Applications Information section for sample layout. tions; use a series resistor if driving from a low impedance
SW (Pins 8, 9):
The SW pins are the outputs of the internal output. This pin may be left floating if the tracking function power switches. Tie these pins together and connect them is not needed. to the inductor and boost capacitor. This node should be kept small on the PCB for good performance and low EMI. Rev. C 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Applications Related Parts
PIN FUNCTIONS BIAS (Pin 1):
The internal regulator will draw current from
GND2 (10, 11):
Power Switch Ground. These pins are the BIAS instead of VIN when BIAS is tied to a voltage higher return path of the internal bottom side power switch and than 3.1V. For output voltages of 3.3V to 25V this pin must be tied together. Place the negative terminal of the should be tied to VOUT. If this pin is tied to a supply other input capacitor as close to the GND2 pins as possible. than VOUT use a 1µF local bypass capacitor on this pin. If Also be sure to tie GND2 to the ground plane. See the no supply is available, tie to GND. Applications Information section for sample layout.
INTVCC (Pin 2):
Internal 3.4V Regulator Bypass Pin. The
VIN2 (Pin 13):
The LT8641 requires two 1µF small input internal power drivers and control circuits are powered bypass capacitors. One 1µF capacitor should be placed from this voltage. INTVCC maximum output current is between VIN1 and GND1. A second 1µF capacitor should 20mA. Do not load the INTVCC pin with external circuitry. be placed between VIN2 and GND2. These capacitors INTVCC current will be supplied from BIAS if BIAS > must be placed as close as possible to the LT8641. A 3.1V, otherwise current will be drawn from VIN. Voltage third larger capacitor of 2.2µF or more should be placed on INTVCC will vary between 2.8V and 3.4V when BIAS close to the LT8641 with the positive terminal connected is between 3.0V and 3.6V. Decouple this pin to power to VIN1 and VIN2, and the negative terminal connected ground with at least a 1μF low ESR ceramic capacitor to ground. See the Applications Information section for placed close to the IC. sample layout.
BST (Pin 3):
This pin is used to provide a drive voltage,
EN/UV (Pin 14):
The LT8641 is shut down when this pin higher than the input voltage, to the topside power switch. is low and active when this pin is high. The hysteretic Place a 0.1µF boost capacitor as close as possible to the threshold voltage is 1.00V going up and 0.96V going IC. down. Tie to VIN if the shutdown feature is not used. An
V
external resistor divider from VIN can be used to program
IN1 (Pin 4):
The LT8641 requires two 1µF small input bypass capacitors. One 1µF capacitor should be placed a VIN threshold below which the LT8641 will shut down. between VIN1 and GND1. A second 1µF capacitor should
RT (Pin 15):
A resistor is tied between RT and ground to be placed between VIN2 and GND2. These capacitors must set the switching frequency. be placed as close as possible to the LT8641. A third
TR/SS (Pin 16):
Output Tracking and Soft-Start Pin. This larger capacitor of 2.2µF or more should be placed close pin allows user control of output voltage ramp rate during to the LT8641 with the positive terminal connected to VIN1 start-up. A TR/SS voltage below 0.8V forces the LT8641 and VIN2, and the negative terminal connected to ground. to regulate the FB pin to equal the TR/SS pin voltage. See applications section for sample layout. When TR/SS is above 0.8V, the tracking function is dis-
GND1 (6, 7):
Power Switch Ground. These pins are the abled and the internal reference resumes control of the return path of the internal bottom side power switch and error amplifier. An internal 1.9μA pull-up current from must be tied together. Place the negative terminal of the INTVCC on this pin allows a capacitor to program output input capacitor as close to the GND1 pins as possible. voltage slew rate. This pin is pulled to ground with an Also be sure to tie GND1 to the ground plane. See the internal 200Ω MOSFET during shutdown and fault condi- Applications Information section for sample layout. tions; use a series resistor if driving from a low impedance
SW (Pins 8, 9):
The SW pins are the outputs of the internal output. This pin may be left floating if the tracking function power switches. Tie these pins together and connect them is not needed. to the inductor and boost capacitor. This node should be kept small on the PCB for good performance and low EMI. Rev. C 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Applications Related Parts
