Datasheet MAX4040, MAX4041, MAX4042, MAX4043, MAX4044 (Maxim) - 9
| Manufacturer | Maxim |
| Description | Single/Dual/Quad, Low-Cost, SOT23, Micropower Rail-to-Rail I/O Op Amps |
| Pages / Page | 16 / 9 — Single/Dual/Quad, Low-Cost, SOT23,. Micropower, Rail-to-Rail I/O Op Amps. … |
| File Format / Size | PDF / 388 Kb |
| Document Language | English |
Single/Dual/Quad, Low-Cost, SOT23,. Micropower, Rail-to-Rail I/O Op Amps. MAX4040–MAX4044. Rail-to-Rail Output Stage
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Single/Dual/Quad, Low-Cost, SOT23, Micropower, Rail-to-Rail I/O Op Amps MAX4040–MAX4044
The MAX4040–MAX4044 family’s inputs are protected from large differential input voltages by internal 2.2kΩ series resistors and back-to-back triple-diode stacks MAX4040– across the inputs (Figure 2). For differential input volt- VIN MAX4044 ages (much less than 1.8V), input resistance is typically 45M R3 Ω. For differential input voltages greater than 1.8V, input resistance is around 4.4kΩ, and the input bias current can be approximated by the following equation: R3 = R1 R2 IBIAS = (VDIFF - 1.8V) / 4.4kΩ In the region where the differential input voltage approaches 1.8V, the input resistance decreases expo- R1 R2 nentially from 45MΩ to 4.4kΩ as the diode block begins conducting. Conversely, the bias current increases with the same curve.
Rail-to-Rail Output Stage
Figure 1a. Minimizing Offset Error Due to Input Bias Current The MAX4040–MAX4044 output stage can drive up to a (Noninverting) 25kΩ load and still swing to within 60mV of the rails. Figure 3 shows the output voltage swing of a MAX4040 configured as a unity-gain buffer, powered from a single +4.0V supply voltage. The output for this setup typically swings from (VEE + 10mV) to (VCC - 10mV) with a 100kΩ MAX4040– load. MAX4044 R3
Applications Information Power-Supply Considerations
The MAX4040–MAX4044 operate from a single +2.4V to R3 = R1 R2 +5.5V supply (or dual ±1.2V to ±2.75V supplies) and consume only 10µA of supply current per amplifier. A VIN high power-supply rejection ratio of 85dB allows the amplifiers to be powered directly off a decaying battery R1 R2 voltage, simplifying design and extending battery life.
Power-Up Settling Time
The MAX4040–MAX4044 typically require 200µs to power up after VCC is stable. During this start-up time, Figure 1b. Minimizing Offset Error Due to Input Bias Current the output is indeterminant. The application circuit (Inverting) should allow for this initial delay. IN+ 2.2kΩ IN- 2.2kΩ Figure 2. Input Protection Circuit
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The MAX4040–MAX4044 family’s inputs are protected from large differential input voltages by internal 2.2kΩ series resistors and back-to-back triple-diode stacks MAX4040– across the inputs (Figure 2). For differential input volt- VIN MAX4044 ages (much less than 1.8V), input resistance is typically 45M R3 Ω. For differential input voltages greater than 1.8V, input resistance is around 4.4kΩ, and the input bias current can be approximated by the following equation: R3 = R1 R2 IBIAS = (VDIFF - 1.8V) / 4.4kΩ In the region where the differential input voltage approaches 1.8V, the input resistance decreases expo- R1 R2 nentially from 45MΩ to 4.4kΩ as the diode block begins conducting. Conversely, the bias current increases with the same curve.
Rail-to-Rail Output Stage
Figure 1a. Minimizing Offset Error Due to Input Bias Current The MAX4040–MAX4044 output stage can drive up to a (Noninverting) 25kΩ load and still swing to within 60mV of the rails. Figure 3 shows the output voltage swing of a MAX4040 configured as a unity-gain buffer, powered from a single +4.0V supply voltage. The output for this setup typically swings from (VEE + 10mV) to (VCC - 10mV) with a 100kΩ MAX4040– load. MAX4044 R3
Applications Information Power-Supply Considerations
The MAX4040–MAX4044 operate from a single +2.4V to R3 = R1 R2 +5.5V supply (or dual ±1.2V to ±2.75V supplies) and consume only 10µA of supply current per amplifier. A VIN high power-supply rejection ratio of 85dB allows the amplifiers to be powered directly off a decaying battery R1 R2 voltage, simplifying design and extending battery life.
Power-Up Settling Time
The MAX4040–MAX4044 typically require 200µs to power up after VCC is stable. During this start-up time, Figure 1b. Minimizing Offset Error Due to Input Bias Current the output is indeterminant. The application circuit (Inverting) should allow for this initial delay. IN+ 2.2kΩ IN- 2.2kΩ Figure 2. Input Protection Circuit
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