Datasheet AEM00300 (E-peas) - 2
| Manufacturer | E-peas |
| Description | Highly Versatile Buck-Boost Ambient Energy Manager Battery Charger with Source Voltage Level Configuration |
| Pages / Page | 26 / 2 — DATASHEET. AEM00300. Table of Contents 1. Introduction. 2. Absolute … |
| File Format / Size | PDF / 768 Kb |
| Document Language | English |
DATASHEET. AEM00300. Table of Contents 1. Introduction. 2. Absolute Maximum Ratings. 3. Thermal Resistance
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DATASHEET AEM00300 Table of Contents 1. Introduction 6 2. Absolute Maximum Ratings 9 3. Thermal Resistance 9 4. Typical Electrical Characteristics at 25 °C 10 5. Recommended Operation Conditions 11 6. Functional Block Diagram 12 7. Theory of Operation 13
7.1. DCDC Converter . .13 7.2. Reset and Wake Up States . .14 7.3. Supply State . .15 7.4. Source Voltage Regulation . .15 7.5. Balancing for Dual-Cel Supercapacitor . 15
8. System Configuration 16
8.1. High Power / Low Power Mode . 16 8.2. Storage Element Configuration . 16 8.3. Custom Mode Configuration . .17 8.4. Disable Storage Element Charging . .17 8.5. Source Level Configuration . 18 8.6. External Components . 19
9. Typical Application Circuits 20
9.1. Example Circuit 1 . 20 9.2. Example Circuit 2 . 21 9.3. Circuit Behaviour . 22
9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 23
9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode . .23 9.5. DCDC Conversion Efficiency From SRC to STO in High Power Mode . .23
10. Schematic 24 11. Layout 25 12. Package Information 26
12.1. Plastic Quad Flatpack No-Lead (QFN 28-pin 4x4mm) . 26 12.2. Board Layout . .27
13. Revision History 27
DS_AEM00300_Rev1.0 Copyright © 2022 e-peas SA Confidential 3 Document Outline Table of Contents List of Tables 1. Introduction 2. Absolute Maximum Ratings 3. Thermal Resistance 4. Typical Electrical Characteristics at 25 °C 5. Recommended Operation Conditions 6. Functional Block Diagram 7. Theory of Operation 7.1. DCDC Converter 7.2. Reset and Wake Up States 7.3. Supply State 7.4. Source Voltage Regulation 7.5. Balancing for Dual-Cell Supercapacitor 8. System Configuration 8.1. High Power / Low Power Mode 8.2. Storage Element Configuration 8.3. Custom Mode Configuration 8.4. Disable Storage Element Charging 8.5. Source Level Configuration 8.6. External Components 8.6.1. Storage element information 8.6.2. External inductor information 8.6.3. External capacitors information CSRC CINT 9. Typical Application Circuits 9.1. Example Circuit 1 9.2. Example Circuit 2 9.3. Circuit Behaviour 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.5. DCDC Conversion Efficiency From SRC to STO in High Power Mode 10. Schematic 11. Layout 12. Package Information 12.1. Plastic Quad Flatpack No-Lead (QFN 28-pin 4x4mm) 12.2. Board Layout 13. Revision History
DATASHEET AEM00300 Table of Contents 1. Introduction 6 2. Absolute Maximum Ratings 9 3. Thermal Resistance 9 4. Typical Electrical Characteristics at 25 °C 10 5. Recommended Operation Conditions 11 6. Functional Block Diagram 12 7. Theory of Operation 13
7.1. DCDC Converter . .13 7.2. Reset and Wake Up States . .14 7.3. Supply State . .15 7.4. Source Voltage Regulation . .15 7.5. Balancing for Dual-Cel Supercapacitor . 15
8. System Configuration 16
8.1. High Power / Low Power Mode . 16 8.2. Storage Element Configuration . 16 8.3. Custom Mode Configuration . .17 8.4. Disable Storage Element Charging . .17 8.5. Source Level Configuration . 18 8.6. External Components . 19
9. Typical Application Circuits 20
9.1. Example Circuit 1 . 20 9.2. Example Circuit 2 . 21 9.3. Circuit Behaviour . 22
9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 23
9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode . .23 9.5. DCDC Conversion Efficiency From SRC to STO in High Power Mode . .23
10. Schematic 24 11. Layout 25 12. Package Information 26
12.1. Plastic Quad Flatpack No-Lead (QFN 28-pin 4x4mm) . 26 12.2. Board Layout . .27
13. Revision History 27
DS_AEM00300_Rev1.0 Copyright © 2022 e-peas SA Confidential 3 Document Outline Table of Contents List of Tables 1. Introduction 2. Absolute Maximum Ratings 3. Thermal Resistance 4. Typical Electrical Characteristics at 25 °C 5. Recommended Operation Conditions 6. Functional Block Diagram 7. Theory of Operation 7.1. DCDC Converter 7.2. Reset and Wake Up States 7.3. Supply State 7.4. Source Voltage Regulation 7.5. Balancing for Dual-Cell Supercapacitor 8. System Configuration 8.1. High Power / Low Power Mode 8.2. Storage Element Configuration 8.3. Custom Mode Configuration 8.4. Disable Storage Element Charging 8.5. Source Level Configuration 8.6. External Components 8.6.1. Storage element information 8.6.2. External inductor information 8.6.3. External capacitors information CSRC CINT 9. Typical Application Circuits 9.1. Example Circuit 1 9.2. Example Circuit 2 9.3. Circuit Behaviour 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.5. DCDC Conversion Efficiency From SRC to STO in High Power Mode 10. Schematic 11. Layout 12. Package Information 12.1. Plastic Quad Flatpack No-Lead (QFN 28-pin 4x4mm) 12.2. Board Layout 13. Revision History
