Datasheet ADG636 (Analog Devices) - 3

ManufacturerAnalog Devices
Description1 pC Charge Injection, 100 pA Leakage, CMOS, ±5 V/+5 V/+3 V Dual SPDT Switch
Pages / Page16 / 3 — ADG636. SPECIFICATIONS DUAL SUPPLY. Table 1. Parameter. +25°C. −40°C to …
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ADG636. SPECIFICATIONS DUAL SUPPLY. Table 1. Parameter. +25°C. −40°C to +85°C. −40°C to +125°C. Unit. Test Conditions/Comments

ADG636 SPECIFICATIONS DUAL SUPPLY Table 1 Parameter +25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments

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ADG636 SPECIFICATIONS DUAL SUPPLY
VDD = 5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V. All specifications −40°C to +125°C, unless otherwise noted.
Table 1. Parameter +25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range VSS to VDD V VDD = +4.5 V, VSS = −4.5 V On Resistance, RON 85 Ω typ VS = ±3 V, IDS = −1 mA, Figure 14 115 140 160 Ω max VS = ±3 V, IDS = −1 mA, Figure 14 On-Resistance Match Between 2 Ω typ VS = ±3 V, IDS = −1 mA Channels, ΔRON 4 5.5 6.5 Ω max VS = ±3 V, IDS = −1 mA On-Resistance Flatness, RFLAT(ON) 25 Ω typ VS = ±3 V, IDS = −1 mA 40 55 60 Ω max VS = ±3 V, IDS = −1 mA LEAKAGE CURRENTS VDD = +5.5 V, VSS = −5.5 V Source Off Leakage, IS (Off ) ±0.01 nA typ VS = ±4.5 V, VD = 4.5 V, Figure 15 ±0.1 ±0.25 ±2 nA max VS = ±4.5 V, VD = 4.5 V, Figure 15 Drain Off Leakage, ID (Off ) ±0.01 nA typ VS = ±4.5 V, VD = 4.5 V, Figure 15 ±0.1 ±0.25 ±2 nA max VS = ±4.5 V, VD = 4.5 V, Figure 15 Channel On Leakage, ID (On), IS (On) ±0.01 nA typ VS = VD = ±4.5 V, Figure 16 ±0.1 ±0.25 ±6 nA max VS = VD = ±4.5 V, Figure 16 DIGITAL INPUTS Input High Voltage, VINH 2.4 V min Input Low Voltage, VINL 0.8 V max Input Current, IINL or IINH 0.005 μA typ VIN = VINL or VINH ±0.1 μA max VIN = VINL or VINH Digital Input Capacitance, CIN 2 pF typ DYNAMIC CHARACTERISTICS1 Transition Time 70 ns typ VS1A = +3 V, VS1B = −3 V, RL = 300 Ω, CL = 35 pF, Figure 17 100 120 150 ns max VS1A = +3 V, VS1B = −3 V, RL = 300 Ω, CL = 35 pF, Figure 17 tON Enable 100 ns typ RL = 300 Ω, CL = 35 pF, VS = 3 V, Figure 19 135 170 190 ns max RL = 300 Ω, CL = 35 pF, VS = 3 V, Figure 19 tOFF Enable 55 ns typ RL = 300 Ω, CL = 35 pF, VS = 3 V, Figure 19 80 90 100 ns max RL = 300 Ω, CL = 35 pF, VS = 3 V, Figure 19 Break-Before-Make Time Delay, tBBM 20 ns typ RL = 300 Ω, CL = 35 pF, VS = 3 V, Figure 18 10 ns min RL = 300 Ω, CL = 35 pF, VS = 3 V, Figure 18 Charge Injection −1.2 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF, Figure 20 Off Isolation −65 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz, Figure 21 Channel-to-Channel Crosstalk −65 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz, Figure 23 Bandwidth −3 dB 610 MHz typ RL = 50 Ω, CL = 5 pF, Figure 22 Rev. B | Page 3 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY OUTLINE DIMENSIONS ORDERING GUIDE
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