Datasheet VNF1048F (STMicroelectronics) - 2
| Manufacturer | STMicroelectronics |
| Description | High-side switch Controller with intelligent fuse protection for 12 V, 24 V and 48 V automotive applications |
| Pages / Page | 52 / 2 — VNF1048F. Block diagram and pin description. Figure 1. Block diagram. … |
| File Format / Size | PDF / 2.6 Mb |
| Document Language | English |
VNF1048F. Block diagram and pin description. Figure 1. Block diagram. Figure 2. Configuration diagram (top view). DS13084. Rev 6
Model Line for this Datasheet
Text Version of Document
VNF1048F Block diagram and pin description 1 Block diagram and pin description Figure 1. Block diagram
VS VCP P-channel Bypass CP CP2P Current Sense ISNS_P Internal CP2M Charge Pump Amplifier with LDO CP1P ADC's ISNS_N CP1M VCP V3V3 HS_GATE VSPI Gate Driver HS CSN OUT SDI ST-SPI VDS detection SDO Logic with ADC SCK DIAG ADC's NTC HWLO TJ VNTClevel NTC_M shifter GND
Figure 2. Configuration diagram (top view)
NC CP1M CP1P CP2M CP2P CP NC VS 32 31 30 29 28 27 26 25 VSPI 1 24 HS_GATE CSN 2 23 OUT SDI 3 22 NC SDO 4 21 ISNS_P SCK 5 20 ISNS_N DIAG 6 19 NTC TEST1 7 18 NTC_M TEST2 8 17 NC 9 10 11 12 13 14 15 16 NC NC V3V3 GND NC NC NC HWLO Note: TAB connection must be to ground. TAB is not intended as device reference ground (dedicated pin shall be used).
DS13084
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Rev 6 page 2/52
Document Outline 1 Block diagram and pin description 2 Electrical specification 2.1 Absolute maximum ratings 2.2 Thermal data 2.3 Main electrical characteristics 3 eFuse function 4 Self Test 4.1 Current Sense Self Test 4.2 External FET VDS Detection Self Test 4.3 External FET Stuck-on Self Test 5 Protections 5.1 Battery undervoltage shutdown 5.2 Device overtemperature shutdown 5.3 External MOSFET overtemperature shutdown 5.4 External MOSFET desaturation shut-down 5.5 Hard short circuit latch-off 5.6 Current vs time latch-off 5.7 Low Current Bypass desaturation shut-down 6 SPI functional description 6.1 SPI Communication 6.2 Signal description 6.3 SPI protocol 6.4 Operating code definition 6.5 Write mode 6.6 Read mode 6.7 Read and clear status command 6.8 SPI device information 6.9 Special commands 6.10 Global status byte 6.11 Address map 6.12 ROM memory map 6.13 Control registers 6.14 Status registers 6.15 Timeout watchdog 7 Operating modes 7.1 State Diagram 7.2 PowerON mode 7.3 Stand-by mode 7.4 WakeUp mode 7.5 Unlocked mode 7.6 Locked mode 7.7 Self-test mode 8 Application information 9 Package information 9.1 QFN32L 5x5 package information Revision history
VS VCP P-channel Bypass CP CP2P Current Sense ISNS_P Internal CP2M Charge Pump Amplifier with LDO CP1P ADC's ISNS_N CP1M VCP V3V3 HS_GATE VSPI Gate Driver HS CSN OUT SDI ST-SPI VDS detection SDO Logic with ADC SCK DIAG ADC's NTC HWLO TJ VNTClevel NTC_M shifter GND
Figure 2. Configuration diagram (top view)
NC CP1M CP1P CP2M CP2P CP NC VS 32 31 30 29 28 27 26 25 VSPI 1 24 HS_GATE CSN 2 23 OUT SDI 3 22 NC SDO 4 21 ISNS_P SCK 5 20 ISNS_N DIAG 6 19 NTC TEST1 7 18 NTC_M TEST2 8 17 NC 9 10 11 12 13 14 15 16 NC NC V3V3 GND NC NC NC HWLO Note: TAB connection must be to ground. TAB is not intended as device reference ground (dedicated pin shall be used).
DS13084
-
Rev 6 page 2/52
Document Outline 1 Block diagram and pin description 2 Electrical specification 2.1 Absolute maximum ratings 2.2 Thermal data 2.3 Main electrical characteristics 3 eFuse function 4 Self Test 4.1 Current Sense Self Test 4.2 External FET VDS Detection Self Test 4.3 External FET Stuck-on Self Test 5 Protections 5.1 Battery undervoltage shutdown 5.2 Device overtemperature shutdown 5.3 External MOSFET overtemperature shutdown 5.4 External MOSFET desaturation shut-down 5.5 Hard short circuit latch-off 5.6 Current vs time latch-off 5.7 Low Current Bypass desaturation shut-down 6 SPI functional description 6.1 SPI Communication 6.2 Signal description 6.3 SPI protocol 6.4 Operating code definition 6.5 Write mode 6.6 Read mode 6.7 Read and clear status command 6.8 SPI device information 6.9 Special commands 6.10 Global status byte 6.11 Address map 6.12 ROM memory map 6.13 Control registers 6.14 Status registers 6.15 Timeout watchdog 7 Operating modes 7.1 State Diagram 7.2 PowerON mode 7.3 Stand-by mode 7.4 WakeUp mode 7.5 Unlocked mode 7.6 Locked mode 7.7 Self-test mode 8 Application information 9 Package information 9.1 QFN32L 5x5 package information Revision history
