Datasheet SR6P3EC4 (STMicroelectronics) - 10
| Manufacturer | STMicroelectronics |
| Description | 32-bit Arm Cortex R52+ automotive integration MCU 4 Cortex R52+ cores, 19.5 MB xMemory, 1.8 MB RAM, with embedded virtualization, safety, and security in FPBGA292 package |
| Pages / Page | 10 / 10 — SR6P3EC4 SR6P3EC6. IMPORTANT NOTICE – READ CAREFULLY. DB5468. Rev 4. page … |
| File Format / Size | PDF / 572 Kb |
| Document Language | English |
SR6P3EC4 SR6P3EC6. IMPORTANT NOTICE – READ CAREFULLY. DB5468. Rev 4. page 10/10
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Text Version of Document
SR6P3EC4 SR6P3EC6 IMPORTANT NOTICE – READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. In the event of any conflict between the provisions of this document and the provisions of any contractual arrangement in force between the purchasers and ST, the provisions of such contractual arrangement shall prevail. The purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgment. The purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of the purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. If the purchasers identify an ST product that meets their functional and performance requirements but that is not designated for the purchasers' market segment, the purchasers shall contact ST for more information. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2026 STMicroelectronics – All rights reserved
DB5468
-
Rev 4 page 10/10
Document Outline SR6P3EC4 SR6P3EC6 Features 1 Introduction 1.1 Document overview 1.2 Description 1.3 Block diagram 2 Ordering information Revision history Glossary ADC AEC AES ASIL ATOM CAN CAN FD® CAN XL® CPU CRC DCF DMA DSP eDMA EMC EVITA FCCU FPBGA FPU GB GPIO GTM HSM I/O I2C IEC IEEE IPv4 IPv6 ISO JTAG KB LIN LVDS M_TTCAN MB MCAN MCS MCU MII NoC NPU NVM OA3p OS OSR OTA PHY PLL PSI5 RAM RGMII RMII SAR SDADC SENT SIMD SIPI SPI SPIQ SRAM SRC ST SWD TIM TIO TOM UART VLAN xMemory XS_CAN
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. In the event of any conflict between the provisions of this document and the provisions of any contractual arrangement in force between the purchasers and ST, the provisions of such contractual arrangement shall prevail. The purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgment. The purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of the purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. If the purchasers identify an ST product that meets their functional and performance requirements but that is not designated for the purchasers' market segment, the purchasers shall contact ST for more information. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2026 STMicroelectronics – All rights reserved
DB5468
-
Rev 4 page 10/10
Document Outline SR6P3EC4 SR6P3EC6 Features 1 Introduction 1.1 Document overview 1.2 Description 1.3 Block diagram 2 Ordering information Revision history Glossary ADC AEC AES ASIL ATOM CAN CAN FD® CAN XL® CPU CRC DCF DMA DSP eDMA EMC EVITA FCCU FPBGA FPU GB GPIO GTM HSM I/O I2C IEC IEEE IPv4 IPv6 ISO JTAG KB LIN LVDS M_TTCAN MB MCAN MCS MCU MII NoC NPU NVM OA3p OS OSR OTA PHY PLL PSI5 RAM RGMII RMII SAR SDADC SENT SIMD SIPI SPI SPIQ SRAM SRC ST SWD TIM TIO TOM UART VLAN xMemory XS_CAN