Datasheet TL431A, TL431B, NCV431A, NCV431B, SCV431A (ON Semiconductor) - 7
| Manufacturer | ON Semiconductor |
| Description | Programmable Precision References |
| Pages / Page | 23 / 7 — TL431A, B Series, NCV431A, B Series, SCV431A. Figure 14. Pulse Response. … |
| File Format / Size | PDF / 686 Kb |
| Document Language | English |
TL431A, B Series, NCV431A, B Series, SCV431A. Figure 14. Pulse Response. Figure 15. Stability Boundary Conditions
Model Line for this Datasheet
- TL431CDG TL431CDMR2 TL431CDMR2G TL431CDR2 TL431CDR2G TL431CLP TL431CLPG TL431CLPRA TL431CLPRAG TL431CLPRE TL431CLPREG TL431CLPRM TL431CLPRMG TL431CLPRP TL431CLPRPG TL431CP TL431CPG TL431IDG TL431IDMR2 TL431IDMR2G TL431IDR2 TL431IDR2G TL431ILP TL431ILPG TL431ILPRA TL431ILPRAG TL431ILPRE TL431ILPRM TL431ILPRP TL431ILPRPG TL431IP TL431IPG
- TL431ACDG TL431ACDMR2 TL431ACDMR2G TL431ACDR2 TL431ACDR2G TL431ACLP TL431ACLPG TL431ACLPRA TL431ACLPRAG TL431ACLPRE TL431ACLPREG TL431ACLPRP TL431ACLPRPG TL431ACP TL431ACPG TL431AIDG TL431AIDMR2 TL431AIDMR2G TL431AIDR2 TL431AIDR2G TL431AILP TL431AILPG TL431AILPRA TL431AILPRAG TL431AILPRM TL431AILPRMG TL431AILPRP TL431AILPRPG TL431AIP TL431AIPG
- TL431BCD TL431BCDG TL431BCDMR2 TL431BCDMR2G TL431BCDR2 TL431BCDR2G TL431BCLP TL431BCLPG TL431BCLPRA TL431BCLPRAG TL431BCLPRE TL431BCLPREG TL431BCLPRM TL431BCLPRMG TL431BCP TL431BCPG TL431BID TL431BIDG TL431BIDMR2 TL431BIDMR2G TL431BIDR2 TL431BIDR2G TL431BILP TL431BILPG TL431BILPRA TL431BILPRAG TL431BIP TL431BIPG TL431BVD TL431BVDG TL431BVDMR2 TL431BVDMR2G TL431BVDR2 TL431BVDR2G TL431BVLP TL431BVLPG TL431BVLPRAG TL431BVP TL431BVPG
Text Version of Document
TL431A, B Series, NCV431A, B Series, SCV431A
140 T Unstable Programmed 3.0 A = 25°C Input TA = 25°C Area VKA(V) C Monitor 120 220 Output A Vref Output B 5.0 2.0 Pulse 100 (mA) C 10 Generator 50 D 15 f = 100 kHz 80 1.0 GND 60 TAGE SWING (V) Stable Stable D 0 VOL 40 B B THODE CURRENT 5.0 Input , CA A 20 A 0 I K 0 0 4.0 8.0 12 16 20 1.0 nF 10 nF 100 nF 1.0 mF 10 mF 100 mF t, TIME (ms) CL, LOAD CAPACITANCE
Figure 14. Pulse Response Figure 15. Stability Boundary Conditions
150 150 I I K K 10 k V+ V+ C C L L
Figure 16. Test Circuit For Curve A Figure 17. Test Circuit For Curves B, C, And D of Stability Boundary Conditions of Stability Boundary Conditions TYPICAL APPLICATIONS
V+ V V+ out Vout R1 R1 R2 R2 V + Ǔ out ǒ1 ) R1 V R2 ref V + Ǔ out ǒ1 ) R1 V R2 ref
Figure 18. Shunt Regulator Figure 19. High Current Shunt Regulator www.onsemi.com Share Feedback 7
Your Opinion Matters
140 T Unstable Programmed 3.0 A = 25°C Input TA = 25°C Area VKA(V) C Monitor 120 220 Output A Vref Output B 5.0 2.0 Pulse 100 (mA) C 10 Generator 50 D 15 f = 100 kHz 80 1.0 GND 60 TAGE SWING (V) Stable Stable D 0 VOL 40 B B THODE CURRENT 5.0 Input , CA A 20 A 0 I K 0 0 4.0 8.0 12 16 20 1.0 nF 10 nF 100 nF 1.0 mF 10 mF 100 mF t, TIME (ms) CL, LOAD CAPACITANCE
Figure 14. Pulse Response Figure 15. Stability Boundary Conditions
150 150 I I K K 10 k V+ V+ C C L L
Figure 16. Test Circuit For Curve A Figure 17. Test Circuit For Curves B, C, And D of Stability Boundary Conditions of Stability Boundary Conditions TYPICAL APPLICATIONS
V+ V V+ out Vout R1 R1 R2 R2 V + Ǔ out ǒ1 ) R1 V R2 ref V + Ǔ out ǒ1 ) R1 V R2 ref
Figure 18. Shunt Regulator Figure 19. High Current Shunt Regulator www.onsemi.com Share Feedback 7
Your Opinion Matters