Datasheet TLC555 (Texas Instruments) - 4
| Manufacturer | Texas Instruments |
| Description | LinCMOS Timer |
| Pages / Page | 41 / 4 — TLC555. www.ti.com. TLC555I: D and P Packages. 8-Pin SOIC, PDIP. Top … |
| Revision | H |
| File Format / Size | PDF / 1.4 Mb |
| Document Language | English |
TLC555. www.ti.com. TLC555I: D and P Packages. 8-Pin SOIC, PDIP. Top View. Pin Functions: TLC555I. PIN. I/O. DESCRIPTION. NAME. SOIC, PDIP
Text Version of Document
TLC555
SLFS043H – SEPTEMBER 1983 – REVISED AUGUST 2016
www.ti.com TLC555I: D and P Packages 8-Pin SOIC, PDIP Top View
GND 1 8 VDD TRIG 2 7 DISCH OUT 3 6 THRES RESET 4 5 CONT
Pin Functions: TLC555I PIN I/O DESCRIPTION NAME SOIC, PDIP
CONT 5 I Controls comparator thresholds. Outputs 2/3 VDD and allows bypass capacitor connection. DISCH 7 O Open-collector output to discharge timing capacitor GND 1 — Ground OUT 3 O High current timer output signal RESET 4 I Active low reset input forces output and discharge low THRES 6 I End of timing input. THRES > CONT sets output low and discharge low. TRIG 2 I Start of timing input. TRIG < ½ CONT sets output high and discharge open. VDD 8 — Power-supply voltage 4 Submit Documentation Feedback Copyright © 1983–2016, Texas Instruments Incorporated Product Folder Links: TLC555 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Device Comparison Table 6 Pin Configuration and Functions 7 Specifications 7.1 Absolute Maximum Ratings 7.2 Recommended Operating Conditions 7.3 Thermal Information 7.4 Electrical Characteristics: VDD = 2 V for TLC555C, VDD = 3 V for TLC555I 7.5 Electrical Characteristics: VDD = 5 V 7.6 Electrical Characteristics: VDD = 15 V 7.7 Electrical Characteristics: VDD = 5 V 7.8 Typical Characteristics 8 Detailed Description 8.1 Overview 8.2 Functional Block Diagram 8.3 Feature Description 8.3.1 Monostable Operation 8.3.2 Astable Operation 8.3.3 Frequency Divider 8.4 Device Functional Modes 9 Application and Implementation 9.1 Application Information 9.2 Typical Applications 9.2.1 Missing-Pulse Detector 9.2.1.1 Design Requirements 9.2.1.2 Detailed Design Procedure 9.2.1.3 Application Curve 9.2.2 Pulse-Width Modulation 9.2.2.1 Design Requirements 9.2.2.2 Detailed Design Procedure 9.2.2.3 Application Curve 9.2.3 Pulse-Position Modulation 9.2.3.1 Design Requirements 9.2.3.2 Detailed Design Procedure 9.2.3.3 Application Curve 9.2.4 Sequential Timer 9.2.4.1 Design Requirements 9.2.4.2 Detailed Design Procedure 9.2.4.3 Application Curve 10 Power Supply Recommendations 11 Layout 11.1 Layout Guidelines 11.2 Layout Example 12 Device and Documentation Support 12.1 Receiving Notification of Documentation Updates 12.2 Community Resources 12.3 Trademarks 12.4 Electrostatic Discharge Caution 12.5 Glossary 13 Mechanical, Packaging, and Orderable Information
SLFS043H – SEPTEMBER 1983 – REVISED AUGUST 2016
www.ti.com TLC555I: D and P Packages 8-Pin SOIC, PDIP Top View
GND 1 8 VDD TRIG 2 7 DISCH OUT 3 6 THRES RESET 4 5 CONT
Pin Functions: TLC555I PIN I/O DESCRIPTION NAME SOIC, PDIP
CONT 5 I Controls comparator thresholds. Outputs 2/3 VDD and allows bypass capacitor connection. DISCH 7 O Open-collector output to discharge timing capacitor GND 1 — Ground OUT 3 O High current timer output signal RESET 4 I Active low reset input forces output and discharge low THRES 6 I End of timing input. THRES > CONT sets output low and discharge low. TRIG 2 I Start of timing input. TRIG < ½ CONT sets output high and discharge open. VDD 8 — Power-supply voltage 4 Submit Documentation Feedback Copyright © 1983–2016, Texas Instruments Incorporated Product Folder Links: TLC555 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Device Comparison Table 6 Pin Configuration and Functions 7 Specifications 7.1 Absolute Maximum Ratings 7.2 Recommended Operating Conditions 7.3 Thermal Information 7.4 Electrical Characteristics: VDD = 2 V for TLC555C, VDD = 3 V for TLC555I 7.5 Electrical Characteristics: VDD = 5 V 7.6 Electrical Characteristics: VDD = 15 V 7.7 Electrical Characteristics: VDD = 5 V 7.8 Typical Characteristics 8 Detailed Description 8.1 Overview 8.2 Functional Block Diagram 8.3 Feature Description 8.3.1 Monostable Operation 8.3.2 Astable Operation 8.3.3 Frequency Divider 8.4 Device Functional Modes 9 Application and Implementation 9.1 Application Information 9.2 Typical Applications 9.2.1 Missing-Pulse Detector 9.2.1.1 Design Requirements 9.2.1.2 Detailed Design Procedure 9.2.1.3 Application Curve 9.2.2 Pulse-Width Modulation 9.2.2.1 Design Requirements 9.2.2.2 Detailed Design Procedure 9.2.2.3 Application Curve 9.2.3 Pulse-Position Modulation 9.2.3.1 Design Requirements 9.2.3.2 Detailed Design Procedure 9.2.3.3 Application Curve 9.2.4 Sequential Timer 9.2.4.1 Design Requirements 9.2.4.2 Detailed Design Procedure 9.2.4.3 Application Curve 10 Power Supply Recommendations 11 Layout 11.1 Layout Guidelines 11.2 Layout Example 12 Device and Documentation Support 12.1 Receiving Notification of Documentation Updates 12.2 Community Resources 12.3 Trademarks 12.4 Electrostatic Discharge Caution 12.5 Glossary 13 Mechanical, Packaging, and Orderable Information