Datasheet TL074, TL074A -TL074B (STMicroelectronics)
| Manufacturer | STMicroelectronics |
| Description | LOW NOISE J-FET QUAD OPERATIONAL AMPLIFIERS |
| Pages / Page | 11 / 1 — TL074. TL074A - TL074B. DIP14. (Plastic Package). SO14. (Plastic … |
| File Format / Size | PDF / 302 Kb |
| Document Language | English |
TL074. TL074A - TL074B. DIP14. (Plastic Package). SO14. (Plastic Micropackage). ORDER CODE. DESCRIPTION. Package. Part Number
Text Version of Document
TL074 TL074A - TL074B
LOW NOISE J-FET QUAD OPERATIONAL AMPLIFIERS ■ WIDE COMMON-MODE (UP TO V + CC ) AND DIFFERENTIAL VOLTAGE RANGE ■ LOW INPUT BIAS AND OFFSET CURRENT ■ LOW NOISE en = 15nV/√Hz (typ) ■ OUTPUT SHORT-CIRCUIT PROTECTION
N
■ HIGH INPUT IMPEDANCE J–FET INPUT
DIP14
STAGE
(Plastic Package)
■ LOW HARMONIC DISTORTION : 0.01% (typ) ■ INTERNAL FREQUENCY COMPENSATION ■ LATCH UP FREE OPERATION ■ HIGH SLEW RATE : 13V/µs (typ)
D SO14 (Plastic Micropackage) ORDER CODE DESCRIPTION Package
The TL074, TL074A and TL074B are high speed
Part Number Temperature Range N D
J–FET input quad operational amplifiers incorpo- TL074M/AM/BM -55°C, +125°C • • rating well matched, high voltage J–FET and bipo- TL074I/AI/BI -40°C, +105°C • • lar transistors in a monolithic integrated circuit. TL074C/AC/BC 0°C, +70°C • • The devices feature high slew rates, low input bias
Example :
TL074IN and offset currents, and low offset voltage temper- ature coefficient.
N =
Dual in Line Package (DIP)
D =
Small Outline Package (SO) - also available in Tape & Reel (DT)
PIN CONNECTIONS
(top view)
Output 1 1 14 Output 4 Inverting Input 1 2 13 Inverting Input 4 - - Non-inverting Input 1 3 + + 12 Non-inverting Input 4 CC V + - 4 11 CC V Non-inverting Input 2 5 10 Non-inverting Input 3 + + Inverting Input 2 6 - - 9 Inverting Input 3 Output 2 7 8 Output 3 March 2001 1/11
LOW NOISE J-FET QUAD OPERATIONAL AMPLIFIERS ■ WIDE COMMON-MODE (UP TO V + CC ) AND DIFFERENTIAL VOLTAGE RANGE ■ LOW INPUT BIAS AND OFFSET CURRENT ■ LOW NOISE en = 15nV/√Hz (typ) ■ OUTPUT SHORT-CIRCUIT PROTECTION
N
■ HIGH INPUT IMPEDANCE J–FET INPUT
DIP14
STAGE
(Plastic Package)
■ LOW HARMONIC DISTORTION : 0.01% (typ) ■ INTERNAL FREQUENCY COMPENSATION ■ LATCH UP FREE OPERATION ■ HIGH SLEW RATE : 13V/µs (typ)
D SO14 (Plastic Micropackage) ORDER CODE DESCRIPTION Package
The TL074, TL074A and TL074B are high speed
Part Number Temperature Range N D
J–FET input quad operational amplifiers incorpo- TL074M/AM/BM -55°C, +125°C • • rating well matched, high voltage J–FET and bipo- TL074I/AI/BI -40°C, +105°C • • lar transistors in a monolithic integrated circuit. TL074C/AC/BC 0°C, +70°C • • The devices feature high slew rates, low input bias
Example :
TL074IN and offset currents, and low offset voltage temper- ature coefficient.
N =
Dual in Line Package (DIP)
D =
Small Outline Package (SO) - also available in Tape & Reel (DT)
PIN CONNECTIONS
(top view)
Output 1 1 14 Output 4 Inverting Input 1 2 13 Inverting Input 4 - - Non-inverting Input 1 3 + + 12 Non-inverting Input 4 CC V + - 4 11 CC V Non-inverting Input 2 5 10 Non-inverting Input 3 + + Inverting Input 2 6 - - 9 Inverting Input 3 Output 2 7 8 Output 3 March 2001 1/11
