An input-level-versus-frequency plot of the RF-to-digital comparator measured from the RF source's reference plane to a clean logic output reveals less-than-100-mV sensitivity at 160 MHz and usable output to 200 MHz

AuthorsFrancis Rodes
Main DocumentArticle «CMOS inverters convert RF to digital signal»
DescriptionFigure 3
File Format / SizePDF / 19 Kb
Document Languageenglish

An input-level-versus-frequency plot of the RF-to-digital comparator measured from the RF source's reference plane to a clean logic output reveals less-than-100-mV sensitivity at 160 MHz and usable output to 200 MHz

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