A1 input buffer unloads VIN, and R5 calibration trim improves accuracy
| Authors | Stephen Woodward |
| Main Document | Article «Simple speedy single-slope ADC» |
| Description | Figure 3 |
| File Format / Size | PDF / 16 Kb |
| Document Language | English |
Other Materials from the Main Document
- Article «Simple speedy single-slope ADC»
- Figure 1. Simple speedy single-slope (SSSS) ADC biphasic conversion cycle
- Figure 2. The SSSS ADC waveshapes. The ACQUIRE duration (12 bits) is 90 µs. The INTEGRATE duration is 1 ms max (VIN·C1/IQ1 = 200 µs/V). Amplitude is 5 Vpp
- Figure 3. A1 input buffer unloads VIN, and R5 calibration trim improves accuracy