Datasheet Texas Instruments CD74AC20MG4
Manufacturer | Texas Instruments |
Series | CD74AC20 |
Part Number | CD74AC20MG4 |
Dual 4-Input NAND Gates 14-SOIC -55 to 125
Datasheets
CD74AC20 datasheet
PDF, 594 Kb, Revision: B, File published: Nov 15, 2002
Extract from the document
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Status
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
Packaging
Pin | 14 |
Package Type | D |
Industry STD Term | SOIC |
JEDEC Code | R-PDSO-G |
Package QTY | 50 |
Carrier | TUBE |
Device Marking | AC20M |
Width (mm) | 3.91 |
Length (mm) | 8.65 |
Thickness (mm) | 1.58 |
Pitch (mm) | 1.27 |
Max Height (mm) | 1.75 |
Mechanical Data | Download |
Parametrics
Bits | 2 |
F @ Nom Voltage(Max) | 100 Mhz |
ICC @ Nom Voltage(Max) | 0.04 mA |
Operating Temperature Range | -55 to 125 C |
Output Drive (IOL/IOH)(Max) | 24/-24 mA |
Package Group | SOIC |
Package Size: mm2:W x L | 14SOIC: 52 mm2: 6 x 8.65(SOIC) PKG |
Rating | Catalog |
Schmitt Trigger | No |
Technology Family | AC |
VCC(Max) | 5.5 V |
VCC(Min) | 1.5 V |
Voltage(Nom) | 1.5,3.3,5 V |
tpd @ Nom Voltage(Max) | 139,15.5,11.1 ns |
Eco Plan
RoHS | Compliant |
Application Notes
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple VccPDF, 43 Kb, File published: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
Model Line
Series: CD74AC20 (6)
- CD74AC20E CD74AC20M CD74AC20M96 CD74AC20M96E4 CD74AC20M96G4 CD74AC20MG4
Manufacturer's Classification
- Semiconductors > Logic > Gate > NAND Gate