Datasheet Texas Instruments SNJ54LVTH16374WD
| Manufacturer | Texas Instruments |
| Series | SN54LVTH16374 |
| Part Number | SNJ54LVTH16374WD |
3.3-V ABT 16-Bit Edge-Triggered D-type Flip-Flops With 3-State Outputs 48-CFP -55 to 125
Datasheets
3.3-V ABT 16-Bit Edge-Triggered D-Type Flip-Flops With 3-State Outputs datasheet
PDF, 766 Kb, Revision: R, File published: Aug 23, 2007
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Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 48 | 48 | 48 | 48 |
| Package Type | WD | WD | WD | WD |
| Industry STD Term | CFP | CFP | CFP | CFP |
| JEDEC Code | R-GDFP-F | R-GDFP-F | R-GDFP-F | R-GDFP-F |
| Package QTY | 1 | 1 | 1 | 1 |
| Carrier | TUBE | TUBE | TUBE | TUBE |
| Device Marking | WD | SNJ54LVTH16374 | 5962-9564701QX | A |
| Width (mm) | 9.66 | 9.66 | 9.66 | 9.66 |
| Length (mm) | 15.88 | 15.88 | 15.88 | 15.88 |
| Thickness (mm) | 2.48 | 2.48 | 2.48 | 2.48 |
| Pitch (mm) | .635 | .635 | .635 | .635 |
| Max Height (mm) | 3.05 | 3.05 | 3.05 | 3.05 |
| Mechanical Data | Download | Download | Download | Download |
Parametrics
| 3-State Output | Yes |
| Bits | 16 |
| F @ Nom Voltage(Max) | 160 Mhz |
| ICC @ Nom Voltage(Max) | 5 mA |
| Input Type | TTL |
| Operating Temperature Range | -55 to 125 C |
| Output Drive (IOL/IOH)(Max) | 64/-32 mA |
| Output Type | TTL |
| Package Group | CFP |
| Package Size: mm2:W x L | See datasheet (CFP) PKG |
| Rating | Military |
| Technology Family | LVT |
| VCC(Max) | 3.6 V |
| VCC(Min) | 2.7 V |
| tpd @ Nom Voltage(Max) | 4.5 ns |
Eco Plan
| RoHS | See ti.com |
Application Notes
- LVT Family Characteristics (Rev. A)PDF, 98 Kb, Revision: A, File published: Mar 1, 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti - LVT-to-LVTH ConversionPDF, 84 Kb, File published: Dec 8, 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
Model Line
Series: SN54LVTH16374 (2)
- 5962-9564701QXA SNJ54LVTH16374WD
Manufacturer's Classification
- Semiconductors > Space & High Reliability > Logic Products > Flip-Flop/Latch/Registers
