Datasheet Texas Instruments TMS320DM6433
| Manufacturer | Texas Instruments |
| Series | TMS320DM6433 |
Digital Media Processor
Datasheets
TMS320DM6433 Digital Media Processor datasheet
PDF, 2.3 Mb, Revision: C, File published: Jun 6, 2008
Extract from the document
Prices
Status
| TMS320DM6433ZDU4 | TMS320DM6433ZDU6 | TMS320DM6433ZDU7 | TMS320DM6433ZDUL | TMS320DM6433ZWT4 | TMS320DM6433ZWT5 | TMS320DM6433ZWT6 | TMS320DM6433ZWT7 | TMS320DM6433ZWTL | |
|---|---|---|---|---|---|---|---|---|---|
| Lifecycle Status | NRND (Not recommended for new designs) | NRND (Not recommended for new designs) | NRND (Not recommended for new designs) | Obsolete (Manufacturer has discontinued the production of the device) | NRND (Not recommended for new designs) | NRND (Not recommended for new designs) | NRND (Not recommended for new designs) | NRND (Not recommended for new designs) | NRND (Not recommended for new designs) |
| Manufacture's Sample Availability | No | No | No | No | No | No | No | No | No |
Packaging
| TMS320DM6433ZDU4 | TMS320DM6433ZDU6 | TMS320DM6433ZDU7 | TMS320DM6433ZDUL | TMS320DM6433ZWT4 | TMS320DM6433ZWT5 | TMS320DM6433ZWT6 | TMS320DM6433ZWT7 | TMS320DM6433ZWTL | |
|---|---|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 |
| Pin | 376 | 376 | 376 | 376 | 361 | 361 | 361 | 361 | 361 |
| Package Type | ZDU | ZDU | ZDU | ZDU | ZWT | ZWT | ZWT | ZWT | ZWT |
| Industry STD Term | BGA | BGA | BGA | BGA | NFBGA | NFBGA | NFBGA | NFBGA | NFBGA |
| JEDEC Code | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N |
| Device Marking | TMS320 | DM6433ZDU6 | TMS320 | DM6433ZDUL | TMS320 | DM6433ZWT | DM6433ZWT | DM6433ZWT | TMS320 |
| Width (mm) | 23 | 23 | 23 | 23 | 16 | 16 | 16 | 16 | 16 |
| Length (mm) | 23 | 23 | 23 | 23 | 16 | 16 | 16 | 16 | 16 |
| Thickness (mm) | 1.78 | 1.78 | 1.78 | 1.78 | .9 | .9 | .9 | .9 | .9 |
| Pitch (mm) | 1 | 1 | 1 | 1 | .8 | .8 | .8 | .8 | .8 |
| Max Height (mm) | 2.48 | 2.48 | 2.48 | 2.48 | 1.4 | 1.4 | 1.4 | 1.4 | 1.4 |
| Mechanical Data | Download | Download | Download | Download | Download | Download | Download | Download | Download |
| Package QTY | 60 | 60 | 90 | 90 | 90 | 90 | |||
| Carrier | JEDEC TRAY (5+1) | JEDEC TRAY (5+1) |
Parametrics
| Parameters / Models | TMS320DM6433ZDU4 | TMS320DM6433ZDU6 | TMS320DM6433ZDU7 | TMS320DM6433ZDUL | TMS320DM6433ZWT4 | TMS320DM6433ZWT5 | TMS320DM6433ZWT6 | TMS320DM6433ZWT7 | TMS320DM6433ZWTL |
|---|---|---|---|---|---|---|---|---|---|
| Applications | Automotive Communications and Telecom Consumer Electronics Energy Industrial Security Video and Imaging | ||||||||
| Approx. Price (US$) | 18.07 | 1ku | ||||||||
| DRAM | DDR2 | ||||||||
| DSP | 1 C64x | ||||||||
| DSP MHz (Max.) | 400 500 600 700 | ||||||||
| EMAC | 10/100 | ||||||||
| I2C | 1 | ||||||||
| On-Chip L2 Cache | 128 KB (DSP) | ||||||||
| Operating Systems | DSP/BIOS VLX | ||||||||
| Operating Temperature Range(C) | -40 to 125 | ||||||||
| PCI/PCIe | 1 32-Bit [33 MHz] | ||||||||
| Pin/Package | 361NFBGA | ||||||||
| Rating | Catalog | ||||||||
| UART(SCI) | 1 | ||||||||
| Video Port (Configurable) | 1 Dedicated Output | ||||||||
| Video Resolution/Frame Rate | D1 or Less |
Eco Plan
| TMS320DM6433ZDU4 | TMS320DM6433ZDU6 | TMS320DM6433ZDU7 | TMS320DM6433ZDUL | TMS320DM6433ZWT4 | TMS320DM6433ZWT5 | TMS320DM6433ZWT6 | TMS320DM6433ZWT7 | TMS320DM6433ZWTL | |
|---|---|---|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Not Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
| Pb Free | No | Yes | Yes | Yes | Yes | Yes |
Application Notes
- How to Use the EDMA3 Driver on a TMS320DM643x Device (Rev. A)PDF, 152 Kb, Revision: A, File published: Jun 16, 2008
This application report describes how to use the existing enhanced direct memory access (EDMA3) driver on the TMS320DM643x device. It explains several complicated transfers required for certain real-life application using the EDMA3. - Using the TMS320DM643x Bootloader (Rev. E)PDF, 268 Kb, Revision: E, File published: Mar 23, 2012
This document describes the functionality of the DM643x ROM bootloader software. Please note that the ROM bootloader requires use of Application Image Script (AIS) as the primary data format for loading code/data. AIS is a Texas Instruments, Inc. proprietary data format. AIS is explained in detail in Section 3 of this document. - How to Use the VPBE and VPFE Driver on the TMS320DM643x Devices (Rev. A)PDF, 225 Kb, Revision: A, File published: Nov 14, 2007
This application report describes how to use the existing video processing back end (VPBE) and video processing front end (VPFE) driver on the TMS320DM643x devices. The VPBE block is comprised of the on-screen display (OSD) and the video encoder (VENC) modules. The VPFE is comprised of five modules: charge-coupled device (CCD) controller (CCDC), resizer, preview, hardware 3A statistic generator (H - TMS320DM643x Power Consumption Summary (Rev. C)PDF, 135 Kb, Revision: C, File published: May 10, 2010
Note: PRELIMINARY DATA FOR TMX DEVICES. INFORMATION SUBJECT TO CHANGEThis application report discusses power consumption of the Texas Instruments TMS320DM643x Digital Media Processor (DMP). Power consumption is highly application-dependent, so a spreadsheet is provided to model power consumption for your applications.Note: TMX devices are experimental devices that are not necessa - TMS320DM643x Pin Multiplexing UtilityPDF, 1.8 Mb, File published: Jul 6, 2007
The DM643x devices use a great deal of internal pin multiplexing to allow the most functionality in the smallest and lowest cost package. The software accompanying this application report allows the pin multiplexing registers of the device to be calculated with ease, as well as showing what peripherals can be used together and what devices of the DM643x family support the peripherals that are sele - Implementing DDR2 PCB Layout on the TMS320DM643x DMSoC (Rev. A)PDF, 150 Kb, Revision: A, File published: Jun 26, 2008
This application report contains implementation instructions for the DDR2 interface contained on the TMS320DM643x digital signal processor (DSP) device. The approach to specifying interface timing for the DDR2 interface is quite different than on previous devices.The previous approach specified device timing in terms of data sheet specifications and simulation models. The system designer was - 5Vin DM643x Power using a PMIC (Multi-output DC/DC Converter)PDF, 302 Kb, File published: Oct 9, 2008
- DaVinci Technology Background and Specifications (Rev. A)PDF, 108 Kb, Revision: A, File published: Jan 4, 2007
- Understanding the Davinci Resizer (Rev. B)PDF, 469 Kb, Revision: B, File published: Jul 17, 2008
The image-scaling operation is one of the most commonly used video and imaging processing functions. The resizer hardware module in the DaVinciв„ў video processing subsystem (VPSS) provides the scaling capability in hardware, therefore off-loading the system for other processing tasks. To achieve good video quality while maintaining good overall system performance, a better understanding of th - Understanding the Davinci Preview Engine (Rev. A)PDF, 209 Kb, Revision: A, File published: Jul 23, 2008
The Preview Engine block in the DaVinci video processing sub-system (VPSS) provides some critical functions for image and video processing. These functions, if implemented in software, require a significant number of computations in terms of million instructions per second (MIPs). By offloading these functions, the valuable MIPs can be used for more differentiating tasks, such as video compression - 5Vin DM643x Power using DC/DC Controllers and LDOPDF, 741 Kb, File published: Oct 9, 2008
- 12Vin DM643x Power using Integrated-FET DC/DC Converters and LDOPDF, 310 Kb, File published: Oct 9, 2008
- 5Vin DM643x Power using Integrated-FET DC/DC Converters and LDOPDF, 550 Kb, File published: Oct 9, 2008
- EDMA v2.0 to EDMA v3.0 (EDMA3) Migration Guide (Rev. A)PDF, 292 Kb, Revision: A, File published: Aug 21, 2008
This application report summarizes the key differences between the enhanced direct memory access (EDMA3) used on C64x+в„ў DSP devices and the EDMA2 used on TMS320C64xв„ў DSP devices, and provides guidance for migrating from EDMA2 to EDMA3. - Understanding TI's PCB Routing Rule-Based DDR Timing Specification (Rev. A)PDF, 93 Kb, Revision: A, File published: Jul 17, 2008
This application report motivates the way the DDR high-speed timing requirements are now going to be communicated to system designers. The traditional method of using data sheet parameters and simulation models is tedious. The system designer uses this information to evaluate whether timing specifications are met and can be expected to operate reliably.Ultimately, the real question the hardwa - Plastic Ball Grid Array [PBGA] Application Note (Rev. B)PDF, 1.6 Mb, Revision: B, File published: Aug 13, 2015
- TMS320C64x to TMS320C64x+ CPU Migration Guide (Rev. A)PDF, 310 Kb, Revision: A, File published: Oct 20, 2005
This document describes migration from the Texas Instruments TMS320C64xв„ў digital signal processor (DSP) to the TMS320C64x+в„ў DSP. The objective of this document is to indicate differences between the two cores and to briefly describe new features. Functionality in the devices that is identical is not included. For detailed information about either device, see the TMS320C64x/C64x+ DSP - Common Object File Format (COFF)PDF, 125 Kb, File published: Apr 15, 2009
- Introduction to TMS320C6000 DSP OptimizationPDF, 535 Kb, File published: Oct 6, 2011
The TMS320C6000™ Digital Signal Processors (DSPs) have many architectural advantages that make them ideal for computation-intensive real-time applications. However to fully leverage the architectural features that C6000™ processors offer code optimization may be required. First this document reviews five key concepts in understanding the C6000 DSP architecture and optimization. Then
Model Line
Series: TMS320DM6433 (9)
Manufacturer's Classification
- Semiconductors> Processors> Digital Signal Processors> Media Processors > DaVinci Video Processors
