Datasheet AD9434 (Analog Devices) - 5

ManufacturerAnalog Devices
Description12-Bit, 370 MSPS/500 MSPS, 1.8 V Analog-to-Digital Converter
Pages / Page29 / 5 — AD9434. Data Sheet. AC SPECIFICATIONS. Table 2. AD9434-370. AD9434-500. …
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AD9434. Data Sheet. AC SPECIFICATIONS. Table 2. AD9434-370. AD9434-500. Parameter1, 2. Temp. Min. Typ. Max. Unit

AD9434 Data Sheet AC SPECIFICATIONS Table 2 AD9434-370 AD9434-500 Parameter1, 2 Temp Min Typ Max Unit

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AD9434 Data Sheet AC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, TMIN = −40°C, TMAX = +85°C, fIN = −1.0 dBFS, full scale = 1.5 V, unless otherwise noted.
Table 2. AD9434-370 AD9434-500 Parameter1, 2 Temp Min Typ Max Min Typ Max Unit
SNR fIN = 30.3 MHz 25°C 66.3 65.9 dBFS fIN = 70.3 MHz 25°C 66.2 65.9 dBFS fIN = 100.3 MHz 25°C 66.1 65.8 dBFS Full 65.3 64.5 dBFS fIN = 250.3 MHz 25°C 65.5 65.2 dBFS fIN = 450.3 MHz 25°C 64.0 63.5 dBFS SINAD fIN = 30.3 MHz 25°C 66.1 65.9 dBFS fIN = 70.3 MHz 25°C 66.1 65.8 dBFS fIN = 100.3 MHz 25°C 66.0 65.8 dBFS Full 65.2 64.4 dBFS fIN = 250.3 MHz 25°C 65.3 64.8 dBFS fIN = 450.3 MHz 25°C 63.7 62.9 dBFS EFFECTIVE NUMBER OF BITS (ENOB) fIN = 30.3 MHz 25°C 10.7 10.7 Bits fIN = 70.3 MHz 25°C 10.7 10.6 Bits fIN = 100.3 MHz 25°C 10.7 10.6 Bits fIN = 250.3 MHz 25°C 10.6 10.5 Bits fIN = 450.3 MHz 25°C 10.3 10.2 Bits WORST HARMONIC (SECOND or THIRD) fIN = 30.3 MHz 25°C −93 −93 dBc fIN = 70.3 MHz 25°C −89 −91 dBc fIN = 100.3 MHz 25°C −83 −87 dBc Full −75 −74 dBc fIN = 250.3 MHz 25°C −80 −78 dBc fIN = 450.3 MHz 25°C −78 −69 dBc SFDR fIN = 30.3 MHz 25°C 89 84 dBc fIN = 70.3 MHz 25°C 88 82 dBc fIN = 100.3 MHz 25°C 83 83 dBc Full 75 74 dBc fIN = 250.3 MHz 25°C 79 78 dBc fIN = 450.3 MHz 25°C 78 68 dBc WORST OTHER HARMONIC (SFDR EXCLUDING SECOND and THIRD) fIN = 30.3 MHz 25°C −90 −85 dBc fIN = 70.3 MHz 25°C −90 −82 dBc fIN = 100.3 MHz 25°C −91 −84 dBc Full −75 −74 dBc fIN = 250.3 MHz 25°C −83 −85 dBc fIN = 450.3 MHz 25°C −82 −78 dBc TWO-TONE IMD fIN1 = 119.5 MHz, fIN2 = 122.5 MHz 25°C −85 −85 dBc ANALOG INPUT BANDWIDTH Full Power 25°C 1 1 GHz 1 All ac specifications tested by driving CLK+ and CLK− differential y. 2 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and how these tests were completed. Rev. B | Page 4 of 28 Document Outline Features Applications General Description Functional Block Diagram Product Highlights Revision History Specifications DC Specifications AC Specifications Digital Specifications Switching Specifications Timing Diagrams Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Equivalent Circuits Theory of Operation Analog Input and Voltage Reference Differential Input Configurations Clock Input Considerations Clock Duty Cycle Considerations Clock Jitter Considerations Power Dissipation and Power-Down Mode Digital Outputs Digital Outputs and Timing Output Data Rate and Pinout Configuration Out-of-Range (OR) Timing VREF AD9434 Configuration Using the SPI Using the AD9434 to Replace the AD9230 Hardware Interface Configuration Without the SPI Memory Map Reading the Memory Map Table Reserved Locations Default Values Logic Levels Outline Dimensions Ordering Guide
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