Datasheet HMCAD1520 (Analog Devices) - 6
| Manufacturer | Analog Devices |
| Description | High Speed Multi-Mode 8/12/14-Bit 1000/640/105 MSPS A/D Converter |
| Pages / Page | 37 / 6 — HMCAD1520. HigH Speed Multi-Mode 8/12/14-Bit. 1000/640/105 MSpS A/d … |
| File Format / Size | PDF / 1.5 Mb |
| Document Language | English |
HMCAD1520. HigH Speed Multi-Mode 8/12/14-Bit. 1000/640/105 MSpS A/d Converter. AC Specifications – precision Mode. Parameter
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Text Version of Document
HMCAD1520
v04.1015
HigH Speed Multi-Mode 8/12/14-Bit 1000/640/105 MSpS A/d Converter AC Specifications – precision Mode
AvDD = DvDD = ovDD = 1.8v, Fs = 105 MHz, 50% clock duty cycle, -1 dBFs 70 MHz input signal, Gain = 1X, dual 8-bit output, rsDs output data levels, unless otherwise noted
Parameter Description Min Typ Max Unit
F = 80 MsPs 85 dBc s F = 105 MsPs 83 dBc s F = 105 MsPs, F = 105 MsPs 78 dBc s in enoB effective number of Bits F = 80 MsPs 11.8 bits s F = 105 MsPs 11.8 bits s F = 105 MsPs, F = 105 MsPs 11.5 bits s in 0 Crosstalk. signal applied to 1 channel (F ). Measurement taken on X In0 70 dBc tlk one channel with full scale at F . F = 71 MHz, F = 70 MHz In1 In1 In0 Power supply I Analog supply Current 229 mA AvDD t I Digital and output driver supply Current 106 mA DvDD M P Analog Power 412 mW AvDD s P Digital Power 191 mW DvDD P total Power Dissipation 603 mW tot s - P Power Down Mode Dissipation 15 µW PD r P Deep sleep Mode Power Dissipation 66 mW e sLP Power Dissipation with all channels in sleep channel mode t P 131 mW sLPCH (Light sleep) r P Power Dissipation savings per channel off 118 mW sLPCH_sAv e
Analog Input
v FPBW Full Power Bandwidth 700 MHz n
Clock Inputs
o F Max. Conversion rate 105 MsPs smax F Min. Conversion rate 15 MsPs smin /D C
digital and Switching Specifications
A AvDD = DvDD = ovDD = 1.8v, rsDs output data levels, unless otherwise noted.
Parameter Description Min Typ Max Unit Clock Inputs
DC Duty Cycle, High speed modes 40 60 % high DC Duty Cycle, Precision mode 30 70 % high Compliance LvDs supported up to 700 Mbps LvPeCL, sine wave, CMos, LvDs v Differential input voltage swing, sine wave clock input 1500 mvpp CK,sine v voltage input range CMos (CLKn connected to ground) v CK,CMos ovDD Input common mode voltage. Keep voltages within ground v 0.3 v -0.3 v CM,CK and voltage of ovDD ovDD C Differential Input capacitance 3 pF CK
Logic inputs (CMOS)
Informatio For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, n furnished by Analog Devices is believed to be accurate and reliable. However, no For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other MA 02062-9106One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106
0 - 5
rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise Phone: 781-329-4700 • Order online at www.analog.com Phone: 781-329-4700 • Order online at www.analog.com under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Application Support: Phone: 1-800-ANALOG-D Application Support: Phone: 1-800-ANALOG-D
v04.1015
HigH Speed Multi-Mode 8/12/14-Bit 1000/640/105 MSpS A/d Converter AC Specifications – precision Mode
AvDD = DvDD = ovDD = 1.8v, Fs = 105 MHz, 50% clock duty cycle, -1 dBFs 70 MHz input signal, Gain = 1X, dual 8-bit output, rsDs output data levels, unless otherwise noted
Parameter Description Min Typ Max Unit
F = 80 MsPs 85 dBc s F = 105 MsPs 83 dBc s F = 105 MsPs, F = 105 MsPs 78 dBc s in enoB effective number of Bits F = 80 MsPs 11.8 bits s F = 105 MsPs 11.8 bits s F = 105 MsPs, F = 105 MsPs 11.5 bits s in 0 Crosstalk. signal applied to 1 channel (F ). Measurement taken on X In0 70 dBc tlk one channel with full scale at F . F = 71 MHz, F = 70 MHz In1 In1 In0 Power supply I Analog supply Current 229 mA AvDD t I Digital and output driver supply Current 106 mA DvDD M P Analog Power 412 mW AvDD s P Digital Power 191 mW DvDD P total Power Dissipation 603 mW tot s - P Power Down Mode Dissipation 15 µW PD r P Deep sleep Mode Power Dissipation 66 mW e sLP Power Dissipation with all channels in sleep channel mode t P 131 mW sLPCH (Light sleep) r P Power Dissipation savings per channel off 118 mW sLPCH_sAv e
Analog Input
v FPBW Full Power Bandwidth 700 MHz n
Clock Inputs
o F Max. Conversion rate 105 MsPs smax F Min. Conversion rate 15 MsPs smin /D C
digital and Switching Specifications
A AvDD = DvDD = ovDD = 1.8v, rsDs output data levels, unless otherwise noted.
Parameter Description Min Typ Max Unit Clock Inputs
DC Duty Cycle, High speed modes 40 60 % high DC Duty Cycle, Precision mode 30 70 % high Compliance LvDs supported up to 700 Mbps LvPeCL, sine wave, CMos, LvDs v Differential input voltage swing, sine wave clock input 1500 mvpp CK,sine v voltage input range CMos (CLKn connected to ground) v CK,CMos ovDD Input common mode voltage. Keep voltages within ground v 0.3 v -0.3 v CM,CK and voltage of ovDD ovDD C Differential Input capacitance 3 pF CK
Logic inputs (CMOS)
Informatio For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, n furnished by Analog Devices is believed to be accurate and reliable. However, no For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other MA 02062-9106One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106
0 - 5
rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise Phone: 781-329-4700 • Order online at www.analog.com Phone: 781-329-4700 • Order online at www.analog.com under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Application Support: Phone: 1-800-ANALOG-D Application Support: Phone: 1-800-ANALOG-D
