Datasheet AD7329 (Analog Devices) - 10

ManufacturerAnalog Devices
Description1 MSPS , 8-Channel, Software Selectable True Bipolar Input, 12-Bit Plus Sign A/D Converter
Pages / Page39 / 10 — Data Sheet. AD7329. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. SCLK. …
RevisionC
File Format / SizePDF / 857 Kb
Document LanguageEnglish

Data Sheet. AD7329. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. SCLK. DIN. DGND. DOUT. AGND. VDRIVE. REF. TOP VIEW. IN/REFOUT. VCC

Data Sheet AD7329 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SCLK DIN DGND DOUT AGND VDRIVE REF TOP VIEW IN/REFOUT VCC

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Data Sheet AD7329 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS CS 1 24 SCLK DIN 2 23 DGND DGND 3 22 DOUT AGND 4 21 VDRIVE AD7329 REF 5 TOP VIEW 20 IN/REFOUT VCC (Not to Scale) V 6 19 SS VDD ADC 7 18 IN+ ADCIN– MUX 8 17 OUT+ MUXOUT– V 9 16 IN0 VIN2 V 10 15 IN1 VIN3 V 11 14 IN4 VIN6
003
V 12 13 IN5 VIN7
05402- Figure 3. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Descriptions
1 CS Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the AD7329 and frames the serial data transfer. 2 DIN Data In. Data to be written to the on-chip registers is provided on this input and is clocked into the register on the falling edge of SCLK (see the Registers section). 3, 23 DGND Digital Ground. Ground reference point for all digital circuitry on the AD7329. Ideally, the DGND and AGND voltages are at the same potential and must not be more than 0.3 V apart, even on a transient basis. 4 AGND Analog Ground. Ground reference point for all analog circuitry on the AD7329. All analog input signals and any external reference signal must be referred to this AGND voltage. Ideally, the AGND and DGND voltages are at the same potential and must not be more than 0.3 V apart, even on a transient basis. 5 REFIN/REFOUT Reference Input/Reference Output. The on-chip reference is available on this pin for use external to the AD7329. The nominal internal reference voltage is 2.5 V, which appears at the pin. A 680 nF capacitor must be placed on the reference pin. Alternatively, the internal reference can be disabled and an external reference can be applied to this input. On power-up, the external reference mode is the default condition (see the Reference section). 6 VSS Negative Power Supply Voltage. This is the negative supply voltage for the analog input section. 7 ADCIN+ Positive ADC Input. This pin allows access to the on-chip track-and-hold. The voltage applied to this pin is still a high voltage signal (±10 V, ±5 V, ±2.5 V, or 0 V to +10 V). 8 MUXOUT+ Positive Multiplexer Output. The output of the multiplexer appears at this pin. The voltage at this pin is still a high voltage signal equivalent to the voltage applied to the VIN+ input channel, as selected in the control register or sequence register. If no external filtering or buffering is required, tie this pin to the ADCIN+ pin. 9, 10, 16, 15, VIN0 to VIN7 Analog Input 0 Through Analog Input 7. The analog inputs are multiplexed into the on-chip track-and-hold. 11, 12, 14, 13 The analog input channel for conversion is selected by programming the channel address bits, ADD2 through ADD0, in the control register. The inputs can be configured as eight single-ended inputs, four true differential input pairs, four pseudo differential inputs, or seven pseudo differential inputs. The configuration of the analog inputs is selected by programming the mode bits, Mode 1 and Mode 0, in the control register. The input range on each input channel is controlled by programming the range registers. Input ranges of ±10 V, ±5 V, ±2.5 V, or 0 V to +10 V can be selected on each analog input channel (see the Range Registers section). On power-up, VIN0 is automatically selected and the voltage on this pin appears on MUXOUT+. 17 MUXOUT− Negative Multiplexer Output. This pin allows access to the on-chip track-and-hold. The voltage applied to this pin is still a high voltage signal when the AD7329 is in differential mode. In single-ended mode, this pin can either be left floating or tied to AGND. When the AD7329 is in pseudo differential mode, a small dc voltage appears at this pin, and this pin is tied to the ADCIN− pin. 18 ADCIN− Negative ADC Input. This pin allows access to the track-and-hold. When the AD7329 is in single-ended mode, tie this pin to AGND. When the AD7329 is in pseudo differential mode, connect this pin to MUXOUT−. When the AD7329 is in true differential mode, the voltage applied to this pin is a high voltage signal (±10 V, ±5 V, ±2.5 V, or 0 V to +10 V). 19 VDD Positive Power Supply Voltage. This is the positive supply voltage for the analog input section. 20 VCC Analog Supply Voltage, 2.7 V to 5.25 V. This is the supply voltage for the ADC core on the AD7329. Decouple this supply to AGND. Rev. C | Page 9 of 38 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION OUTPUT CODING TRANSFER FUNCTIONS ANALOG INPUT STRUCTURE TRACK-AND-HOLD SECTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT Single-Ended Inputs True Differential Mode Pseudo Differential Inputs DRIVER AMPLIFIER CHOICE REGISTERS ADDRESSING REGISTERS CONTROL REGISTER SEQUENCE REGISTER RANGE REGISTERS SEQUENCER OPERATION REFERENCE VDRIVE TEMPERATURE INDICATOR MODES OF OPERATION NORMAL MODE(PM1 = PM0 = 0) FULL SHUTDOWN MODE(PM1 = PM0 = 1) AUTOSHUTDOWN MODE(PM1 = 1, PM0 = 0) AUTOSTANDBY MODE(PM1 = 0, PM0 =1) POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7329 TO ADSP-21xx AD7329 TO ADSP-BF53x APPLICATIONS INFORMATION LAYOUT AND GROUNDING POWER SUPPLY CONFIGURATION OUTLINE DIMENSIONS ORDERING GUIDE
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