Datasheet AD9481 (Analog Devices) - 4
| Manufacturer | Analog Devices |
| Description | 8-Bit, 250 MSPS, 3.3 V A/D Converter |
| Pages / Page | 29 / 4 — AD9481. DC SPECIFICATIONS. Table 1. AD9481-250. Parameter Temp. Test. … |
| File Format / Size | PDF / 736 Kb |
| Document Language | English |
AD9481. DC SPECIFICATIONS. Table 1. AD9481-250. Parameter Temp. Test. Level. Min. Typ. Max. Unit
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AD9481 DC SPECIFICATIONS
AVDD = 3.3 V, DRVDD = 3.3 V; TMIN = −40°C, TMAX = +85°C, AIN = −1 dBFS, full scale = 1.0 V, internal reference, differential analog and clock inputs, unless otherwise noted.
Table 1. AD9481-250 Parameter Temp Test Level Min Typ Max Unit
RESOLUTION 8 Bits ACCURACY No Missing Codes Full VI Guaranteed Offset Error 25°C I −40 40 mV Gain Error1 25°C I −6.0 6.0 % FS Differential Nonlinearity (DNL) Full VI −0.85 ±0.35 0.85 LSB Integral Nonlinearity (INL) Full VI −0.9 ±0.26 0.9 LSB TEMPERATURE DRIFT Offset Error Full V 30 µV/°C Gain Error Full V 0.03 % FS/°C Reference Full V ±0.025 mV/°C REFERENCE Internal Reference Voltage Full VI 0.97 1.0 1.03 V Output Current2 25°C IV 1.5 mA IVREF Input Current3 25°C I 100 µA ISENSE Input Current2 25°C I 10 µA ANALOG INPUTS (VIN+, VIN−) Differential Input Voltage Range4 Full V 1 V p-p Common-Mode Voltage Full VI 1.6 1.9 2.1 V Input Resistance Full VI 8.4 10 11.2 kΩ Input Capacitance 25°C V 4 pF Analog Bandwidth, Full Power 25°C V 750 MHz POWER SUPPLY AVDD Full IV 3.0 3.3 3.6 V DRVDD Full IV 3.0 3.3 3.6 V Supply Currents IAVDD5 Full VI 133 145 mA IDRVDD5 Full VI 39 42.5 mA Power Dissipation5 25°C V 439 mW Power-Down Dissipation 25°C V 15 37 mW Power Supply Rejection Ratio (PSRR) 25°C V −4.2 mV/V 1 Gain error and gain temperature coefficients are based on the ADC only (with a fixed 1 V external reference and 1 V p-p input range). 2 Internal reference mode; SENSE = AGND. 3 External reference mode; VREF driven by external 1.0 V reference; SENSE = AVDD. 4 In FS = 1 V, both analog inputs are 500 mV p-p and out of phase with each other. 5 Supply current measured with rated encode and a 20 MHz analog input. Power dissipation measured with dc input, see the Termino section for logy power vs. clock rate. Rev. 0 | Page 3 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS DC SPECIFICATIONS DIGITAL SPECIFICATIONS AC SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS APPLICATIONS ANALOG INPUTS VOLTAGE REFERENCE Fixed Reference External Reference Programmable Reference CLOCKING THE AD9481 DS INPUTS DIGITAL OUTPUTS INTERLEAVING TWO AD9481s DATA CLOCK OUT POWER-DOWN INPUT AD9481 EVALUATION BOARD POWER CONNECTOR ANALOG INPUTS GAIN OPTIONAL OPERATIONAL AMPLIFIER CLOCK OPTIONAL CLOCK BUFFER DS OPTIONAL XTAL VOLTAGE REFERENCE DATA OUTPUTS EVALUATION BOARD BILL OF MATERIALS (BOM) PCB SCHEMATICS PCB LAYERS OUTLINE DIMENSIONS ORDERING GUIDE
AD9481 DC SPECIFICATIONS
AVDD = 3.3 V, DRVDD = 3.3 V; TMIN = −40°C, TMAX = +85°C, AIN = −1 dBFS, full scale = 1.0 V, internal reference, differential analog and clock inputs, unless otherwise noted.
Table 1. AD9481-250 Parameter Temp Test Level Min Typ Max Unit
RESOLUTION 8 Bits ACCURACY No Missing Codes Full VI Guaranteed Offset Error 25°C I −40 40 mV Gain Error1 25°C I −6.0 6.0 % FS Differential Nonlinearity (DNL) Full VI −0.85 ±0.35 0.85 LSB Integral Nonlinearity (INL) Full VI −0.9 ±0.26 0.9 LSB TEMPERATURE DRIFT Offset Error Full V 30 µV/°C Gain Error Full V 0.03 % FS/°C Reference Full V ±0.025 mV/°C REFERENCE Internal Reference Voltage Full VI 0.97 1.0 1.03 V Output Current2 25°C IV 1.5 mA IVREF Input Current3 25°C I 100 µA ISENSE Input Current2 25°C I 10 µA ANALOG INPUTS (VIN+, VIN−) Differential Input Voltage Range4 Full V 1 V p-p Common-Mode Voltage Full VI 1.6 1.9 2.1 V Input Resistance Full VI 8.4 10 11.2 kΩ Input Capacitance 25°C V 4 pF Analog Bandwidth, Full Power 25°C V 750 MHz POWER SUPPLY AVDD Full IV 3.0 3.3 3.6 V DRVDD Full IV 3.0 3.3 3.6 V Supply Currents IAVDD5 Full VI 133 145 mA IDRVDD5 Full VI 39 42.5 mA Power Dissipation5 25°C V 439 mW Power-Down Dissipation 25°C V 15 37 mW Power Supply Rejection Ratio (PSRR) 25°C V −4.2 mV/V 1 Gain error and gain temperature coefficients are based on the ADC only (with a fixed 1 V external reference and 1 V p-p input range). 2 Internal reference mode; SENSE = AGND. 3 External reference mode; VREF driven by external 1.0 V reference; SENSE = AVDD. 4 In FS = 1 V, both analog inputs are 500 mV p-p and out of phase with each other. 5 Supply current measured with rated encode and a 20 MHz analog input. Power dissipation measured with dc input, see the Termino section for logy power vs. clock rate. Rev. 0 | Page 3 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS DC SPECIFICATIONS DIGITAL SPECIFICATIONS AC SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS APPLICATIONS ANALOG INPUTS VOLTAGE REFERENCE Fixed Reference External Reference Programmable Reference CLOCKING THE AD9481 DS INPUTS DIGITAL OUTPUTS INTERLEAVING TWO AD9481s DATA CLOCK OUT POWER-DOWN INPUT AD9481 EVALUATION BOARD POWER CONNECTOR ANALOG INPUTS GAIN OPTIONAL OPERATIONAL AMPLIFIER CLOCK OPTIONAL CLOCK BUFFER DS OPTIONAL XTAL VOLTAGE REFERENCE DATA OUTPUTS EVALUATION BOARD BILL OF MATERIALS (BOM) PCB SCHEMATICS PCB LAYERS OUTLINE DIMENSIONS ORDERING GUIDE
