Datasheet AD7911, AD7921 (Analog Devices)
| Manufacturer | Analog Devices |
| Description | 2-Channel, 2.35 V to 5.25 V, 250 kSPS, 12-Bit A/D Converter |
| Pages / Page | 28 / 1 — 2-Channel, 2.35 V to 5.25 V. 250 kSPS, 10-/12-Bit ADCs. AD7911/. AD7921. … |
| Revision | A |
| File Format / Size | PDF / 355 Kb |
| Document Language | English |
2-Channel, 2.35 V to 5.25 V. 250 kSPS, 10-/12-Bit ADCs. AD7911/. AD7921. FEATURES. FUNCTIONAL BLOCK DIAGRAM. VDD
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2-Channel, 2.35 V to 5.25 V 250 kSPS, 10-/12-Bit ADCs AD7911/ AD7921 FEATURES FUNCTIONAL BLOCK DIAGRAM VDD Fast throughput rate: 250 kSPS Specified for VDD of 2.35 V to 5.25 V Low power: 4 mW typ at 250 kSPS with 3 V supplies VIN0 10-/12-BIT MUX T/H SUCCESSIVE 13.5 mW typ at 250 kSPS with 5 V supplies APPROXIMATION VIN1 ADC Wide input bandwidth: 71 dB minimum SNR at 100 kHz input frequency Flexible power/serial clock speed management No pipeline delays SCLK High speed serial interface: CS SPI®/QSPI™/MICROWIRE™/DSP compatible AD7911/AD7921 CONTROL LOGIC DOUT Standby mode: 1 μA maximum DIN 8-lead TSOT package 8-lead MSOP package
04350-0-001
GND APPLICATIONS
Figure 1.
Battery-powered systems: Personal digital assistants
The AD7911/AD7921 use advanced design techniques to
Medical instruments
achieve very low power dissipation at high throughput rates.
Mobile communications Instrumentation and control systems
The reference for the part is taken internally from VDD, thereby
Data acquisition systems
allowing the widest dynamic input range to the ADC. The
High speed modems
analog input range for the part, therefore, is 0 to VDD. The
Optical sensors
conversion rate is determined by the SCLK signal.
GENERAL DESCRIPTION PRODUCT HIGHLIGHTS
The AD7911/AD79211 are 10-bit and 12-bit, high speed, low 1. 2-channel, 250 kSPS, 10-/12-bit ADCs in TSOT package. power, 2-channel successive approximation ADCs, respectively. 2. Low power consumption. The parts operate from a single 2.35 V to 5.25 V power supply 3. Flexible power/serial clock speed management. and feature throughput rates of up to 250 kSPS. The parts The conversion rate is determined by the serial clock; contain a low noise, wide bandwidth track-and-hold amplifier, conversion time is reduced when the serial clock speed is which can handle input frequencies in excess of 6 MHz. The increased. The parts also feature a power-down mode to conversion process and data acquisition are controlled using CS maximize power efficiency at lower throughput rates. and the serial clock, allowing the devices to interface with Average power consumption is reduced when the power- microprocessors or DSPs. The input signal is sampled on the down mode is used while not converting. Current consumption is 1 μA maximum and 50 nA typically when falling edge of CS, and the conversion is also initiated at this in power-down mode. point. There are no pipeline delays associated with the part. 4. Reference derived from the power supply. The channel to be converted is selected through the DIN pin, 5. No pipeline delay. and the mode of operation is controlled by CS. The serial data The parts feature a standard successive approximation stream from the DOUT pin has a channel identifier bit, which ADC with accurate control of the sampling instant via a CS provides information about the converted channel. input and once-off conversion control. 1 Protected by U.S. Patent Number 6,681,332.
Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. or otherwise under any patent or patent rights of Analog Devices. Trademarks and Tel: 781.329.4700 www.analog.com registered trademarks are the property of their respective owners. Fax: 781.326.8703 ©2004–2011 Analog Devices, Inc. All rights reserved.
Document Outline REVISION HISTORY SPECIFICATIONS AD7911 SPECIFICATIONS AD7921 SPECIFICATIONS TIMING SPECIFICATIONS TIMING DIAGRAMS TIMING EXAMPLES Timing Example 1 Timing Example 2 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT DIGITAL INPUTS DIN INPUT DOUT OUTPUT MODES OF OPERATION NORMAL MODE POWER-DOWN MODE POWER-UP TIME POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7911/AD7921 to TMS320C541 Interface AD7911/AD7921 to ADSP-218x AD7911/AD7921 to DSP563xx Interface APPLICATION HINTS GROUNDING AND LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE
2-Channel, 2.35 V to 5.25 V 250 kSPS, 10-/12-Bit ADCs AD7911/ AD7921 FEATURES FUNCTIONAL BLOCK DIAGRAM VDD Fast throughput rate: 250 kSPS Specified for VDD of 2.35 V to 5.25 V Low power: 4 mW typ at 250 kSPS with 3 V supplies VIN0 10-/12-BIT MUX T/H SUCCESSIVE 13.5 mW typ at 250 kSPS with 5 V supplies APPROXIMATION VIN1 ADC Wide input bandwidth: 71 dB minimum SNR at 100 kHz input frequency Flexible power/serial clock speed management No pipeline delays SCLK High speed serial interface: CS SPI®/QSPI™/MICROWIRE™/DSP compatible AD7911/AD7921 CONTROL LOGIC DOUT Standby mode: 1 μA maximum DIN 8-lead TSOT package 8-lead MSOP package
04350-0-001
GND APPLICATIONS
Figure 1.
Battery-powered systems: Personal digital assistants
The AD7911/AD7921 use advanced design techniques to
Medical instruments
achieve very low power dissipation at high throughput rates.
Mobile communications Instrumentation and control systems
The reference for the part is taken internally from VDD, thereby
Data acquisition systems
allowing the widest dynamic input range to the ADC. The
High speed modems
analog input range for the part, therefore, is 0 to VDD. The
Optical sensors
conversion rate is determined by the SCLK signal.
GENERAL DESCRIPTION PRODUCT HIGHLIGHTS
The AD7911/AD79211 are 10-bit and 12-bit, high speed, low 1. 2-channel, 250 kSPS, 10-/12-bit ADCs in TSOT package. power, 2-channel successive approximation ADCs, respectively. 2. Low power consumption. The parts operate from a single 2.35 V to 5.25 V power supply 3. Flexible power/serial clock speed management. and feature throughput rates of up to 250 kSPS. The parts The conversion rate is determined by the serial clock; contain a low noise, wide bandwidth track-and-hold amplifier, conversion time is reduced when the serial clock speed is which can handle input frequencies in excess of 6 MHz. The increased. The parts also feature a power-down mode to conversion process and data acquisition are controlled using CS maximize power efficiency at lower throughput rates. and the serial clock, allowing the devices to interface with Average power consumption is reduced when the power- microprocessors or DSPs. The input signal is sampled on the down mode is used while not converting. Current consumption is 1 μA maximum and 50 nA typically when falling edge of CS, and the conversion is also initiated at this in power-down mode. point. There are no pipeline delays associated with the part. 4. Reference derived from the power supply. The channel to be converted is selected through the DIN pin, 5. No pipeline delay. and the mode of operation is controlled by CS. The serial data The parts feature a standard successive approximation stream from the DOUT pin has a channel identifier bit, which ADC with accurate control of the sampling instant via a CS provides information about the converted channel. input and once-off conversion control. 1 Protected by U.S. Patent Number 6,681,332.
Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. or otherwise under any patent or patent rights of Analog Devices. Trademarks and Tel: 781.329.4700 www.analog.com registered trademarks are the property of their respective owners. Fax: 781.326.8703 ©2004–2011 Analog Devices, Inc. All rights reserved.
Document Outline REVISION HISTORY SPECIFICATIONS AD7911 SPECIFICATIONS AD7921 SPECIFICATIONS TIMING SPECIFICATIONS TIMING DIAGRAMS TIMING EXAMPLES Timing Example 1 Timing Example 2 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT DIGITAL INPUTS DIN INPUT DOUT OUTPUT MODES OF OPERATION NORMAL MODE POWER-DOWN MODE POWER-UP TIME POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7911/AD7921 to TMS320C541 Interface AD7911/AD7921 to ADSP-218x AD7911/AD7921 to DSP563xx Interface APPLICATION HINTS GROUNDING AND LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE
