Datasheet AD7730, AD7730L (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | CMOS, 24-Bit Low Power Sigma-Delta ADC for Bridge Transducer Applications |
| Pages / Page | 53 / 10 — AD7730/AD7730L. OUTPUT NOISE AND RESOLUTION SPECIFICATION. Output Noise … |
| Revision | B |
| File Format / Size | PDF / 323 Kb |
| Document Language | English |
AD7730/AD7730L. OUTPUT NOISE AND RESOLUTION SPECIFICATION. Output Noise (CHP = 1)
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AD7730/AD7730L OUTPUT NOISE AND RESOLUTION SPECIFICATION
The AD7730 can be programmed to operate in either chop mode or nonchop mode. The chop mode can be enabled in ac-excited or dc-excited applications; it is optional in dc-excited applications, but chop mode must be enabled in ac-excited applications. These options are discussed in more detail in later sections. The chop mode has the advantage of lower drift numbers and better noise im- munity, but the noise is approximately 20% higher for a given –3 dB frequency and output data rate. It is envisaged that the majority of weigh-scale users of the AD7730 will operate the part in chop mode to avail themselves of the excellent drift performance and noise immunity when chopping is enabled. The following tables outline the noise performance of the part in both chop and nonchop modes over all input ranges for a selection of output rates. Settling time refers to the time taken to get an output that is 100% settled to new value.
Output Noise (CHP = 1)
This mode is the primary mode of operation of the device. Table I shows the output rms noise for some typical output update rates and –3 dB frequencies for the AD7730 when used in chopping mode (CHP of Filter Register = 1) with a master clock frequency of 4.9152 MHz. These numbers are typical and are generated at a differential analog input voltage of 0 V. The output update rate is selected via the SF0 to SF11 bits of the Filter Register. Table II, meanwhile, shows the output peak-to-peak resolution in counts for the same output update rates. The numbers in brackets are the effective peak-to-peak resolution in bits (rounded to the nearest 0.5 LSB). It is important to note that the numbers in Table II represent the resolution for which there will be no code flicker within a six-sigma limit. They are not calculated based on rms noise, but on peak-to-peak noise. The numbers are generated for the bipolar input ranges. When the part is operated in unipolar mode, the output noise will be the same as the equivalent bipolar input range. As a result, the numbers in Table I will remain the same for unipolar ranges while the numbers in Table II will change. To calculate the numbers for Table II for unipolar input ranges simply divide the peak-to-peak resolution number in counts by two or subtract one from the peak-to-peak resolution number in bits.
Table I. Output Noise vs. Input Range and Update Rate (CHP = 1) Typical Output RMS Noise in nV Output –3 dB SF Settling Time Settling Time Input Range Input Range Input Range Input Range Data Rate Frequency Word Normal Mode Fast Mode = 80 mV = 40 mV = 20 mV = 10 mV
50 Hz 1.97 Hz 2048 460 ms 60 ms 115 75 55 40 100 Hz 3.95 Hz 1024 230 ms 30 ms 155 105 75 60 150 Hz 5.92 Hz 683 153 ms 20 ms 200 135 95 70 200 Hz* 7.9 Hz 512 115 ms 15 ms 225 145 100 80 400 Hz 15.8 Hz 256 57.5 ms 7.5 ms 335 225 160 110 *Power-On Default
Table II. Peak-to-Peak Resolution vs. Input Range and Update Rate (CHP = 1) Peak-to-Peak Resolution in Counts (Bits) Output –3 dB SF Settling Time Settling Time Input Range Input Range Input Range Input Range Data Rate Frequency Word Normal Mode Fast Mode = 80 mV = 40 mV = 20 mV = 10 mV
50 Hz 1.97 Hz 2048 460 ms 60 ms 230k (18) 175k (17.5) 120k (17) 80k (16.5) 100 Hz 3.95 Hz 1024 230 ms 30 ms 170k (17.5) 125k (17) 90k (16.5) 55k (16) 150 Hz 5.92 Hz 683 153 ms 20 ms 130k (17) 100k (16.5) 70k (16) 45k (15.5) 200 Hz* 7.9 Hz 512 115 ms 15 ms 120k (17) 90k (16.5) 65k (16) 40k (15.5) 400 Hz 15.8 Hz 256 57.5 ms 7.5 ms 80k (16.5) 55k (16) 40k (15.5) 30k (15) *Power-On Default
Output Noise (CHP = 0)
Table III shows the output rms noise for some typical output update rates and –3 dB frequencies for the AD7730 when used in non- chopping mode (CHP of Filter Register = 0) with a master clock frequency of 4.9152 MHz. These numbers are typical and are gen- erated at a differential analog input voltage of 0 V. The output update rate is selected via the SF0 to SF11 bits of the Filter Register. Table IV, meanwhile, shows the output peak-to-peak resolution in counts for the same output update rates. The numbers in brackets are the effective peak-to-peak resolution in bits (rounded to the nearest 0.5 LSB). It is important to note that the numbers in Table IV represent the resolution for which there will be no code flicker within a six-sigma limit. They are not calculated based on rms noise, but on peak-to-peak noise. The numbers are generated for the bipolar input ranges. When the part is operated in unipolar mode, the output noise will be the same as the equivalent bipolar input range. As a result, the numbers in Table III will remain the same for unipolar ranges while the numbers in Table IV will change. To calculate the number for Table IV for unipolar input ranges simply divide the peak-to-peak resolution number in counts by two or subtract one from the peak-to-peak resolution number in bits. –10– REV. B
The AD7730 can be programmed to operate in either chop mode or nonchop mode. The chop mode can be enabled in ac-excited or dc-excited applications; it is optional in dc-excited applications, but chop mode must be enabled in ac-excited applications. These options are discussed in more detail in later sections. The chop mode has the advantage of lower drift numbers and better noise im- munity, but the noise is approximately 20% higher for a given –3 dB frequency and output data rate. It is envisaged that the majority of weigh-scale users of the AD7730 will operate the part in chop mode to avail themselves of the excellent drift performance and noise immunity when chopping is enabled. The following tables outline the noise performance of the part in both chop and nonchop modes over all input ranges for a selection of output rates. Settling time refers to the time taken to get an output that is 100% settled to new value.
Output Noise (CHP = 1)
This mode is the primary mode of operation of the device. Table I shows the output rms noise for some typical output update rates and –3 dB frequencies for the AD7730 when used in chopping mode (CHP of Filter Register = 1) with a master clock frequency of 4.9152 MHz. These numbers are typical and are generated at a differential analog input voltage of 0 V. The output update rate is selected via the SF0 to SF11 bits of the Filter Register. Table II, meanwhile, shows the output peak-to-peak resolution in counts for the same output update rates. The numbers in brackets are the effective peak-to-peak resolution in bits (rounded to the nearest 0.5 LSB). It is important to note that the numbers in Table II represent the resolution for which there will be no code flicker within a six-sigma limit. They are not calculated based on rms noise, but on peak-to-peak noise. The numbers are generated for the bipolar input ranges. When the part is operated in unipolar mode, the output noise will be the same as the equivalent bipolar input range. As a result, the numbers in Table I will remain the same for unipolar ranges while the numbers in Table II will change. To calculate the numbers for Table II for unipolar input ranges simply divide the peak-to-peak resolution number in counts by two or subtract one from the peak-to-peak resolution number in bits.
Table I. Output Noise vs. Input Range and Update Rate (CHP = 1) Typical Output RMS Noise in nV Output –3 dB SF Settling Time Settling Time Input Range Input Range Input Range Input Range Data Rate Frequency Word Normal Mode Fast Mode = 80 mV = 40 mV = 20 mV = 10 mV
50 Hz 1.97 Hz 2048 460 ms 60 ms 115 75 55 40 100 Hz 3.95 Hz 1024 230 ms 30 ms 155 105 75 60 150 Hz 5.92 Hz 683 153 ms 20 ms 200 135 95 70 200 Hz* 7.9 Hz 512 115 ms 15 ms 225 145 100 80 400 Hz 15.8 Hz 256 57.5 ms 7.5 ms 335 225 160 110 *Power-On Default
Table II. Peak-to-Peak Resolution vs. Input Range and Update Rate (CHP = 1) Peak-to-Peak Resolution in Counts (Bits) Output –3 dB SF Settling Time Settling Time Input Range Input Range Input Range Input Range Data Rate Frequency Word Normal Mode Fast Mode = 80 mV = 40 mV = 20 mV = 10 mV
50 Hz 1.97 Hz 2048 460 ms 60 ms 230k (18) 175k (17.5) 120k (17) 80k (16.5) 100 Hz 3.95 Hz 1024 230 ms 30 ms 170k (17.5) 125k (17) 90k (16.5) 55k (16) 150 Hz 5.92 Hz 683 153 ms 20 ms 130k (17) 100k (16.5) 70k (16) 45k (15.5) 200 Hz* 7.9 Hz 512 115 ms 15 ms 120k (17) 90k (16.5) 65k (16) 40k (15.5) 400 Hz 15.8 Hz 256 57.5 ms 7.5 ms 80k (16.5) 55k (16) 40k (15.5) 30k (15) *Power-On Default
Output Noise (CHP = 0)
Table III shows the output rms noise for some typical output update rates and –3 dB frequencies for the AD7730 when used in non- chopping mode (CHP of Filter Register = 0) with a master clock frequency of 4.9152 MHz. These numbers are typical and are gen- erated at a differential analog input voltage of 0 V. The output update rate is selected via the SF0 to SF11 bits of the Filter Register. Table IV, meanwhile, shows the output peak-to-peak resolution in counts for the same output update rates. The numbers in brackets are the effective peak-to-peak resolution in bits (rounded to the nearest 0.5 LSB). It is important to note that the numbers in Table IV represent the resolution for which there will be no code flicker within a six-sigma limit. They are not calculated based on rms noise, but on peak-to-peak noise. The numbers are generated for the bipolar input ranges. When the part is operated in unipolar mode, the output noise will be the same as the equivalent bipolar input range. As a result, the numbers in Table III will remain the same for unipolar ranges while the numbers in Table IV will change. To calculate the number for Table IV for unipolar input ranges simply divide the peak-to-peak resolution number in counts by two or subtract one from the peak-to-peak resolution number in bits. –10– REV. B
