Datasheet AD7703 (Analog Devices)

ManufacturerAnalog Devices
Description20-Bit A/D Converter
Pages / Page17 / 1 — LC2MOS. 20-Bit A/D Converter. AD7703. FEATURES. FUNCTIONAL BLOCK DIAGRAM. …
RevisionF
File Format / SizePDF / 458 Kb
Document LanguageEnglish

LC2MOS. 20-Bit A/D Converter. AD7703. FEATURES. FUNCTIONAL BLOCK DIAGRAM. Monolithic 16-Bit ADC 0.0015% Linearity Error. AVSS. DVSS

Datasheet AD7703 Analog Devices, Revision: F

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LC2MOS 20-Bit A/D Converter AD7703 FEATURES FUNCTIONAL BLOCK DIAGRAM Monolithic 16-Bit ADC 0.0015% Linearity Error AVSS DVSS SC1 SC2 On-Chip Self-Calibration Circuitry 7 6 4 17 Programmable Low-Pass Filter AD7703 0.1 Hz to 10 Hz Corner Frequency DVDD 15 0 V to +2.5 V or

2.5 V Analog Input Range CALIBRATION CALIBRATION MICROCONTROLLER 13 SRAM CAL 4 kSPS Output Data Rate AVDD 14 Flexible Serial Interface Ultralow Power A 20-BIT CHARGE BALANCE A/D IN 9 CONVERTER 12 BP/UP APPLICATIONS Industrial Process Control 6-POLE GAUSSIAN V ANALOG REF 10 Weigh Scales MODULATOR LOW-PASS 11 SLEEP DIGITAL FILTER Portable Instrumentation Remote Data Acquisition AGND 8 20 CLOCK SDATA SERIAL INTERFACE GENERATOR LOGIC 19 DGND SCLK 5 3 2 1 16 18 CLKIN CLKOUT MODE CS DRDY GENERAL DESCRIPTION PRODUCT HIGHLIGHTS
The AD7703 is a 20-bit ADC that uses a S-D conversion tech- 1. The AD7703 offers 20-bit resolution coupled with outstanding nique. The analog input is continuously sampled by an analog 0.0003% accuracy. modulator whose mean output duty cycle is proportional to the 2. No missing codes ensures true, usable, 20-bit dynamic range, input signal. The modulator output is processed by an on-chip removing the need for programmable gain and level-setting digital filter with a six-pole Gaussian response, which updates the circuitry. output data register with 16-bit binary words at word rates up to 4 kHz. The sampling rate, filter corner frequency, and output 3. The effects of temperature drift are eliminated by on-chip word rate are set by a master clock input that may be supplied self-calibration, which removes zero and gain error. External externally, or by a crystal controlled on-chip clock oscillator. circuits can also be included in the calibration loop to remove system offsets and gain errors. The inherent linearity of the ADC is excellent and endpoint accu- racy is ensured by self-calibration of zero and full scale, which 4. Flexible synchronous/asynchronous interface allows the may be initiated at any time. The self-calibration scheme can AD7703 to interface directly to the serial ports of industry- also be extended to null system offset and gain errors in the input standard microcontrollers and DSP processors. channel. 5. Low operating power consumption and an ultralow power The output data is accessed through a flexible serial port, which standby mode make the AD7703 ideal for loop-powered has an asynchronous mode compatible with UARTs and two remote sensing applications, or battery-powered portable synchronous modes suitable for interfacing to shift registers or instruments. the serial ports of industry-standard microcontrollers. CMOS construction ensures low power dissipation, and a power- down mode reduces the idle power consumption to only 10 µW. REV. E Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE TIMING CHARACTERISTICS DEFINITION OF TERMS Linearity Error Differential Linearity Error Positive Full-Scale Error Unipolar Offset Error Bipolar Zero Error Bipolar Negative Full-Scale Error Positive Full-Scale Overrange Negative Full-Scale Overrange Offset Calibration Range Full-Scale Calibration Range Input Span PIN CONFIGURATION DIP, CERDIP, SOIC PIN FUNCTION DESCRIPTIONS GENERAL DESCRIPTION THEORY OF OPERATION DIGITAL FILTERING FILTER CHARACTERISTICS USING THE AD7703 SYSTEM DESIGN CONSIDERATIONS CLOCKING ANALOG INPUT RANGES ACCURACY AUTOCALIBRATION Initiating Calibration Span and Offset Limits POWER-UP AND CALIBRATION Drift Considerations INPUT SIGNAL CONDITIONING Source Resistance Antialias Considerations VOLTAGE REFERENCE CONNECTIONS POWER SUPPLIES AND GROUNDING SLEEP MODE DIGITAL INTERFACE Synchronous Self-Clocking Mode (SSC) Synchronous External Clock Mode (SEC) DIGITAL NOISE AND OUTPUT LOADING OUTLINE DIMENSIONS REVISION HISTORY
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