Datasheet LTC3783 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | PWM LED Driver and Boost, Flyback and SEPIC Controller |
| Pages / Page | 24 / 10 — OPERATION. Figure 1. MODE/SYNC Clock Input and Switching Waveforms. for … |
| File Format / Size | PDF / 311 Kb |
| Document Language | English |
OPERATION. Figure 1. MODE/SYNC Clock Input and Switching Waveforms. for Synchronized Operation
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LTC3783
OPERATION
The SS pin provides a soft-start current to charge an external capacitor. Enabled by RUN, the soft-start current 2V TO 7V MODE/ is 50µA, which creates a positive voltage ramp on V SYNC SS t to which the internal I MIN = 25ns TH is limited, avoiding high peak currents on start-up. Once V 0.8T T T = 1/fO SS reaches 1.23V, the full ITH range is established. GATE D = 40% The LTC3783 can be used either by sensing the voltage drop across the power MOSFET or by connecting the SENSE pin to a conventional shunt resistor in the source of the power MOSFET, as shown in the Typical Application on the first page of this data sheet. Sensing the voltage IL across the power MOSFET maximizes converter efficiency and minimizes the component count, but limits the out- 3783 F01 put voltage to the maximum rating for this pin (36V). By
Figure 1. MODE/SYNC Clock Input and Switching Waveforms
connecting the SENSE pin to a resistor in the source of
for Synchronized Operation
the power MOSFET, the user is able to program output voltages significantly greater than 36V, limited only by frequency operation requires more inductance for a given other components’ breakdown voltages. amount of load current.
Externally Synchronized Operation
The LTC3783 uses a constant frequency architecture that can be programmed over a 20kHz to 1MHz range with When an external clock signal drives the SYNC pin at a a single external resistor from the FREQ pin to ground, rate faster than the chip’s internal oscillator, the oscillator as shown in the application on the first page of this data will synchronize to it. When the oscillator’s internal logic sheet. The nominal voltage on the FREQ pin is 0.615V, circuitry detects a synchronizing signal on the SYNC pin, and the current that flows out of the FREQ pin is used to the internal oscillator ramp is terminated early and the charge and discharge an internal oscillator capacitor. The slope compensation is increased by approximately 25%. oscillator frequency is trimmed to 300kHz with R As a result, in applications requiring synchronization, it T = 20k. A graph for selecting the value of R is recommended that the nominal operating frequency of T for a given operating frequency is shown in Figure 2. the IC be programmed to be about 80% of the external clock frequency. Attempting to synchronize to too high an external frequency (above 1.3fOSC) can result in inad- 1000 equate slope compensation and possible subharmonic oscillation (or jitter). The external clock signal must exceed 2V for at least 25ns, 100 and should have a maximum duty cycle of 80%, as shown in Figure 1. The MOSFET turn-on will synchronize to the (kΩ) R T rising edge of the external clock signal. 10
Programming the Operating Frequency
The choice of operating frequency and inductor value is 1 a tradeoff between efficiency and component size. Low 1 10 100 1000 10000 FREQUENCY (kHz) frequency operation improves efficiency by reducing 3783 G09 MOSFET and diode switching losses. However, lower
Figure 2. Timing Resistor (RT) Value
3783fb 10 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Pin Functions Block Diagram Operation Package Description Related Parts
OPERATION
The SS pin provides a soft-start current to charge an external capacitor. Enabled by RUN, the soft-start current 2V TO 7V MODE/ is 50µA, which creates a positive voltage ramp on V SYNC SS t to which the internal I MIN = 25ns TH is limited, avoiding high peak currents on start-up. Once V 0.8T T T = 1/fO SS reaches 1.23V, the full ITH range is established. GATE D = 40% The LTC3783 can be used either by sensing the voltage drop across the power MOSFET or by connecting the SENSE pin to a conventional shunt resistor in the source of the power MOSFET, as shown in the Typical Application on the first page of this data sheet. Sensing the voltage IL across the power MOSFET maximizes converter efficiency and minimizes the component count, but limits the out- 3783 F01 put voltage to the maximum rating for this pin (36V). By
Figure 1. MODE/SYNC Clock Input and Switching Waveforms
connecting the SENSE pin to a resistor in the source of
for Synchronized Operation
the power MOSFET, the user is able to program output voltages significantly greater than 36V, limited only by frequency operation requires more inductance for a given other components’ breakdown voltages. amount of load current.
Externally Synchronized Operation
The LTC3783 uses a constant frequency architecture that can be programmed over a 20kHz to 1MHz range with When an external clock signal drives the SYNC pin at a a single external resistor from the FREQ pin to ground, rate faster than the chip’s internal oscillator, the oscillator as shown in the application on the first page of this data will synchronize to it. When the oscillator’s internal logic sheet. The nominal voltage on the FREQ pin is 0.615V, circuitry detects a synchronizing signal on the SYNC pin, and the current that flows out of the FREQ pin is used to the internal oscillator ramp is terminated early and the charge and discharge an internal oscillator capacitor. The slope compensation is increased by approximately 25%. oscillator frequency is trimmed to 300kHz with R As a result, in applications requiring synchronization, it T = 20k. A graph for selecting the value of R is recommended that the nominal operating frequency of T for a given operating frequency is shown in Figure 2. the IC be programmed to be about 80% of the external clock frequency. Attempting to synchronize to too high an external frequency (above 1.3fOSC) can result in inad- 1000 equate slope compensation and possible subharmonic oscillation (or jitter). The external clock signal must exceed 2V for at least 25ns, 100 and should have a maximum duty cycle of 80%, as shown in Figure 1. The MOSFET turn-on will synchronize to the (kΩ) R T rising edge of the external clock signal. 10
Programming the Operating Frequency
The choice of operating frequency and inductor value is 1 a tradeoff between efficiency and component size. Low 1 10 100 1000 10000 FREQUENCY (kHz) frequency operation improves efficiency by reducing 3783 G09 MOSFET and diode switching losses. However, lower
Figure 2. Timing Resistor (RT) Value
3783fb 10 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Pin Functions Block Diagram Operation Package Description Related Parts
