Datasheet LTM4603, LTM4603-1 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | 20V, 6A DC/DC µModule Regulator with PLL, Output Tracking and Margining |
| Pages / Page | 26 / 8 — pin Functions (See Package Description for Pin Assignment) fSET (Pin … |
| File Format / Size | PDF / 454 Kb |
| Document Language | English |
pin Functions (See Package Description for Pin Assignment) fSET (Pin B12):. COMP (Pin A11):. FB (Pin F12):. PGOOD (Pin G12):
Model Line for this Datasheet
Text Version of Document
LTM4603/LTM4603-1
pin Functions (See Package Description for Pin Assignment) fSET (Pin B12):
Frequency Set Internally to 1MHz. An
COMP (Pin A11):
Current Control Threshold and Error external resistor can be placed from this pin to ground Amplifier Compensation Point. The current comparator to increase frequency. See the Applications Information threshold increases with this control voltage. The voltage section for frequency adjustment. ranges from 0V to 2.4V with 0.7V corresponding to zero
V
sense voltage (zero current).
FB (Pin F12):
The Negative Input of the Error Ampli- fier. Internally, this pin is connected to VOUT_LCL with a
PGOOD (Pin G12):
Output Voltage Power Good Indicator. 60.4k precision resistor. Different output voltages can be Open-drain logic output that is pulled to ground when the programmed with an additional resistor between VFB and output voltage is not within ±10% of the regulation point, SGND pins. See the Applications Information section. after a 25µs power bad mask timer expires.
MARG0 (Pin C12):
This pin is the LSB logic input for the
RUN (Pin A10):
Run Control Pin. A voltage above 1.9V margining function. Together with the MARG1 pin it will will turn on the module, and when below 1V, will turn determine if margin high, margin low or no margin state off the module. A programmable UVLO function can be is applied. The pin has an internal pull-down resistor of accomplished by connecting to a resistor divider from 50k. See the Applications Information section. VIN to ground. See Figure 1. This pin has a 5.1V Zener to
MARG1 (Pin D12):
This pin is the MSB logic input for the ground. Maximum pin voltage is 5V. Limit current into the margining function. Together with the MARG0 pin it will RUN pin to less than 1mA. determine if margin high, margin low or no margin state
VOUT_LCL (Pin L12):
VOUT connects directly to this pin to is applied. The pin has an internal pull-down resistor of bypass the remote sense amplifier, or DIFFVOUT connects 50k. See the Applications Information section. to this pin when the remote sense amplifier is used.
SGND (Pin H12):
Signal Ground. This pin connects to VOUT_LCL can be connected to VOUT on the LTM4603-1. PGND at output capacitor point. VOUT is internally connected to VOUT_LCL through 50W in the LTM4603-1. 4603fb 8 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Operation Applications Information Typical Application Package Description Revision History Typical Application Package Photograph Related Parts
pin Functions (See Package Description for Pin Assignment) fSET (Pin B12):
Frequency Set Internally to 1MHz. An
COMP (Pin A11):
Current Control Threshold and Error external resistor can be placed from this pin to ground Amplifier Compensation Point. The current comparator to increase frequency. See the Applications Information threshold increases with this control voltage. The voltage section for frequency adjustment. ranges from 0V to 2.4V with 0.7V corresponding to zero
V
sense voltage (zero current).
FB (Pin F12):
The Negative Input of the Error Ampli- fier. Internally, this pin is connected to VOUT_LCL with a
PGOOD (Pin G12):
Output Voltage Power Good Indicator. 60.4k precision resistor. Different output voltages can be Open-drain logic output that is pulled to ground when the programmed with an additional resistor between VFB and output voltage is not within ±10% of the regulation point, SGND pins. See the Applications Information section. after a 25µs power bad mask timer expires.
MARG0 (Pin C12):
This pin is the LSB logic input for the
RUN (Pin A10):
Run Control Pin. A voltage above 1.9V margining function. Together with the MARG1 pin it will will turn on the module, and when below 1V, will turn determine if margin high, margin low or no margin state off the module. A programmable UVLO function can be is applied. The pin has an internal pull-down resistor of accomplished by connecting to a resistor divider from 50k. See the Applications Information section. VIN to ground. See Figure 1. This pin has a 5.1V Zener to
MARG1 (Pin D12):
This pin is the MSB logic input for the ground. Maximum pin voltage is 5V. Limit current into the margining function. Together with the MARG0 pin it will RUN pin to less than 1mA. determine if margin high, margin low or no margin state
VOUT_LCL (Pin L12):
VOUT connects directly to this pin to is applied. The pin has an internal pull-down resistor of bypass the remote sense amplifier, or DIFFVOUT connects 50k. See the Applications Information section. to this pin when the remote sense amplifier is used.
SGND (Pin H12):
Signal Ground. This pin connects to VOUT_LCL can be connected to VOUT on the LTM4603-1. PGND at output capacitor point. VOUT is internally connected to VOUT_LCL through 50W in the LTM4603-1. 4603fb 8 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Operation Applications Information Typical Application Package Description Revision History Typical Application Package Photograph Related Parts
