Datasheet FDD4141 (ON Semiconductor) - 3
Manufacturer | ON Semiconductor |
Description | P-Channel PowerTrench MOSFET, -40V, -50A, 12.3mΩ |
Pages / Page | 8 / 3 — Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics |
Revision | A |
File Format / Size | PDF / 466 Kb |
Document Language | English |
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics
Model Line for this Datasheet
Text Version of Document
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics
BVDSS Drain to Source Breakdown Voltage ID = -250µA, VGS = 0V ∆BVDSS
∆TJ Breakdown Voltage Temperature
Coefficient -40 V ID = -250µA, referenced to 25°C IDSS Zero Gate Voltage Drain Current VDS = -32V, VGS = 0V -1 µA IGSS Gate to Source Leakage Current VGS = ±20V, VDS = 0V ±100 nA -3 V -29 mV/°C On Characteristics
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = -250µA ∆VGS(th)
∆TJ Gate to Source Threshold Voltage
Temperature Coefficient ID = -250µA, referenced to 25°C 5.8 VGS = -10V, ID = -12.7A 10.1 12.3 VGS = -4.5V, ID = -10.4A 14.5 18.0 VGS = -10V, ID = -12.7A,
TJ = 125°C 15.3 18.7 rDS(on) gFS Static Drain to Source On Resistance Forward Transconductance -1 VDS = -5V, ID = -12.7A -1.8 mV/°C 38 mΩ S Dynamic Characteristics
Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = -20V, VGS = 0V,
f = 1MHz
f = 1MHz 2085 2775 pF 360 480 pF 210 310 pF
Ω 4.6 Switching Characteristics
td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg Total Gate Charge VGS = 0V to -10V Qg Total Gate Charge VGS = 0V to -5V Qgs Gate to Source Charge Qgd Gate to Drain “Miller” Charge VDD = -20V, ID = -12.7A,
VGS = -10V, RGEN = 6Ω VDD = -20V,
ID = -12.7A 10 19 ns 7 13 ns 38 60 ns 15 27 ns 36 50 nC 19 27 nC 7 nC 8 nC Drain-Source Diode Characteristics
VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0V, IS = -12.7A (Note 2) IF = -12.7A, di/dt = 100A/µs -0.8 -1.2 V 29 44 ns 26 40 nC Notes:
1: RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
RθJC is guaranteed by design while RθJA is determined by the user’s board design. a) 52°C/W when mounted on a
1 in2 pad of 2 oz copper b) 100°C/W when mounted
on a minimum pad. 2: Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%.
3: Starting TJ = 25°C, L = 3mH, IAS = 15A, VDD = 40V, VGS = 10V. ©2007 Fairchild Semiconductor Corporation
FDD4141 Rev.1.2 2 www.fairchildsemi.com FDD4141 P-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25°C unless otherwise noted