Datasheet IXTA3N50D2, IXTP3N50D2 (IXYS) - 5

ManufacturerIXYS
DescriptionDepletion Mode N-Channel MOSFET
Pages / Page6 / 5 — IXTA3N50D2 IXTP3N50D2. Fig. 13. Capacitance. Fig. 14. Gate Charge. Fig. …
File Format / SizePDF / 160 Kb
Document LanguageEnglish

IXTA3N50D2 IXTP3N50D2. Fig. 13. Capacitance. Fig. 14. Gate Charge. Fig. 15. Forward-Bias Safe Operating Area

IXTA3N50D2 IXTP3N50D2 Fig 13 Capacitance Fig 14 Gate Charge Fig 15 Forward-Bias Safe Operating Area

Model Line for this Datasheet

Text Version of Document

IXTA3N50D2 IXTP3N50D2 Fig. 13. Capacitance Fig. 14. Gate Charge
10,000 5 V f = 1 MHz 4 DS = 250V I D = 1.5A 3 I G = 10mA s d Ciss ra 2 a 1,000 1 icoF lts o P 0 - V GS Coss V -1 tance - ci 100 -2 apa C -3 -4 Crss 10 -5 0 5 10 15 20 25 30 35 40 0 5 10 15 20 25 30 35 40 VDS - Volts QG - NanoCoulombs
Fig. 15. Forward-Bias Safe Operating Area Fig. 16. Forward-Bias Safe Operating Area @ TC = 25oC @ TC = 75oC
100 100 R R DS(on) Limit DS(on) Limit 10 10 s 25μs re es e 25μs p 100μs per m 100μs - A Am - ID 1ms ID 1 1 1ms 10ms TJ = 150oC 100ms TJ = 150oC 10ms TC = 25oC DC TC = 75oC Single Pulse 100ms Single Pulse DC 0.1
Fig. 17. Maximum Transient
0. 1
Thermal Impedance
10.00 10 100 1,000 10 100 1,000 VDS - Volts VDS - Volts
Fig. 17. Maximum Transient Thermal Impedance
2.00 1.00 / W - kC h)J Z(t 0.10 0.01 0.00001 0.0001 0.001 0.01 0.1 1 10 Pulse Width - Seconds © 2017 IXYS CORPORATION, All Rights Reserved IXYS REF: T_3N50D2(3C)8-17-09-A