link to page 1 link to page 1 link to page 1 link to page 1 link to page 1 link to page 1 link to page 2 link to page 4 link to page 5 link to page 6 link to page 7 link to page 7 link to page 7 link to page 8 link to page 9 link to page 9 link to page 10 link to page 11 link to page 11 link to page 12 link to page 14 link to page 15 link to page 17 link to page 17 link to page 18 link to page 18 link to page 20 link to page 20 link to page 21 link to page 21 link to page 22 link to page 24 link to page 25 link to page 26 link to page 27 link to page 27 link to page 28 link to page 28 link to page 30 link to page 30 link to page 31 link to page 31 link to page 31 link to page 31 link to page 32 link to page 32 Forced Frequency Resonant Flyback controllerTable of contents Description DeT scriptionable of contentsDescriptionBased on FW: REV 1.0 .. 1Product Highlights .. 1DescriptionFeatures 1Applications ... 1DescriptionProduct Validation .. 1Description 1Table of contents .. 21Pin Configuration and Functionality .. 42Representative Block Diagram .. 53Introduction .. 64Functional Description ... 7 4.1 Power supply management .. 7 4.1.1 VCC capacitor charge-up and startup sequence ... 7 4.1.2 Brown-in monitoring .. 8 4.1.3 Brown-out protection response .. 9 4.1.4 During burst mode operation ... 9 4.1.5 Bang-bang mode during latched and auto-restart operation ... 10 4.1.5.1 During latched operation.. 11 4.1.5.2 During auto-restart operation .. 11 4.2 Control features ... 12 4.2.1 Reflected voltage sensing and Vcs offset calculation based on output voltage.. 14 4.2.1.1 Output voltage sensing via ZCD pin ... 15 4.2.1.2 Ringing suppression time ... 17 4.2.1.3 Vcs offset calculation based on output voltage sensed at ZCD pin .. 17 4.2.2 Vbulk voltage measurement via HV startup cell ... 18 4.2.3 Propagation delay compensation (PDC) ... 18 4.2.4 Soft-start ... 20 4.2.5 Leading edge blanking (LEB) at CS pin .. 20 4.2.6 Spike blanking at CS pin for 2nd level over-current detection (OCP2) .. 21 4.2.7 Gate driver output GD0 and GD1 ... 21 4.2.8 Multi-mode operation .. 22 4.2.8.1 Frequency law setting for XDPS21071 .. 24 4.2.9 Frequency jittering ... 25 4.2.10 Burst mode operation .. 26 4.2.10.1 Burst mode entry .. 27 4.2.10.2 Burst operation ... 27 4.2.11 Burst mode exit .. 28 4.2.12 Forced frequency resonant (FFR) mode operation ... 28 4.2.13 UART function at GPIO pin ... 30 4.3 Protection features ... 30 4.3.1 Auto-Restart Mode (ARM) ... 31 4.3.2 Latch Mode (LM) ... 31 4.3.3 VCC Under-Voltage lockout (UVOFF) ... 31 4.3.4 Brown-In Protection (BIP) .. 31 4.3.5 Brown-Out Protection (BOP) ... 32 4.3.6 Over-Current Protection level 1 (OCP1) .. 32 Data Sheet 2 Revision 2.0 2019-10-30