Datasheet AD625 (Analog Devices) - 10

AD625
the I × R drops “inside the loop” and virtually eliminating this
GND VDD VSS
error source. Typically, IC instrumentation amplifiers are rated for a full ± 10
A +IN
volt output swing into 2 kΩ. In some applications, however, the
0 +VS
need exists to drive more current into heavier loads. Figure 29
A1
shows how a high-current booster may be connected “inside the
EN SENSE
loop” of an instrumentation amplifier. By using an external
AD7502
power boosting circuit, the power dissipated by the AD625 will
AD625 VOUT
remain low, thereby, minimizing the errors induced by self- heating. The effects of nonlinearities, offset and gain inaccura- cies of the buffer are reduced by the loop gain of the AD625’s
–V REFERENCE
output amplifier.
S –IN +VS VS 39k VREF VIN+ +V SENSE S AD589 1.2V 0.01 F RF R R3 FB 20k R5 R +V G AD625 X1 MSB S 2k DATA C1 INPUTS RF RI LSB OUT 1 AD7524 1/2 OUT 2 R4 V CS 8-BIT DAC 1/2 IN– REFERENCE AD712 10k AD712 –VS WR 5k –V
Figure 29. AD625 /Instrumentation Amplifier with Output
S
Current Booster Figure 30. Software Controllable Offset
REFERENCE TERMINAL
The reference terminal may be used to offset the output by up An instrumentation amplifier can be turned into a voltage-to- to ± 10 V. This is useful when the load is “floating” or does not current converter by taking advantage of the sense and reference share a ground with the rest of the system. It also provides a terminals as shown in Figure 31. direct means of injecting a precise offset. However, it must be remembered that the total output swing is ± 10 volts, from
VIN+ SENSE
ground, to be shared between signal and reference offset.
RF +V
The AD625 reference terminal must be presented with nearly
X– RG AD625 R1
zero impedance. Any significant resistance, including those
RF IL
caused by PC layouts or other connection techniques, will in-
V AD711
crease the gain of the noninverting signal path, thereby, upset-
IN–
ting the common-mode rejection of the in-amp. Inadvertent thermocouple connections created in the sense and reference
LOAD
lines should also be avoided as they will directly affect the out- put offset voltage and output offset voltage drift. Figure 31. Voltage-to-Current Converter In the AD625 a reference source resistance will unbalance the By establishing a reference at the “low” side of a current setting CMR trim by the ratio of 10 kΩ/RREF. For example, if the refer- resistor, an output current may be defined as a function of input ence source impedance is 1 Ω, CMR will be reduced to 80 dB voltage, gain and the value of that resistor. Since only a small (10 kΩ/1 Ω = 80 dB). An operational amplifier may be used to current is demanded at the input of the buffer amplifier A1, the provide the low impedance reference point as shown in Figure forced current I 30. The input offset voltage characteristics of that amplifier will L will largely flow through the load. Offset and drift specifications of A2 must be added to the output offset and add directly to the output offset voltage performance of the drift specifications of the In-Amp. instrumentation amplifier. The circuit of Figure 30 also shows a CMOS DAC operating in
INPUT AND OUTPUT OFFSET VOLTAGE
the bipolar mode and connected to the reference terminal to Offset voltage specifications are often considered a figure of provide software controllable offset adjustments. The total offset merit for instrumentation amplifiers. While initial offset may be range is equal to ± (VREF/2 × R5/R4), however, to be symmetri- adjusted to zero, shifts in offset voltage due to temperature cal about 0 V R3 = 2 × R4. variations will cause errors. Intelligent systems can often correct The offset per bit is equal to the total offset range divided by 2N, for this factor with an autozero cycle, but this requires extra where N = number of bits of the DAC. The range of offset for circuitry. Figure 30 is ± 120 mV, and the offset is incremented in steps of 0.9375 mV/LSB. –10– REV. D