link to page 7 link to page 7 AD524Data SheetAD524CAD524SParameterMinTypMaxMinTypMaxUnit INPUT CURRENT Input Bias Current ±15±50 nA vs. Temperature ±100 ±100 pA/°C Input Offset Current ±10±35 nA vs. Temperature ±100 ±100 pA/°C INPUT Input Impedance Differential Resistance 109 109 Ω Differential Capacitance 10 10 pF Common-Mode Resistance 109 109 Ω Common-Mode Capacitance 10 10 pF Input Voltage Range Maximum Differential Input Linear (VDL)2 ±10 ±10 V Maximum Common-Mode Linear (VCM)2 G G V 12 V − × V12 V − × VD D 2 2 Common-Mode Rejection DC to 60 Hz with 1 kΩ Source Imbalance V G = 1 8070 dB G = 10 10090 dB G = 100 110100 dB G = 1000 120110 dB OUTPUT RATING VOUT, RL = 2 kΩ ±10 ±10 V DYNAMIC RESPONSE Small Signal – 3 dB G = 1 1 1 MHz G = 10 400 400 kHz G = 100 150 150 kHz G = 1000 25 25 kHz Slew Rate 5.0 5.0 V/µs Settling Time to 0.01%, 20 V Step G = 1 to 100 15 15 µs G = 1000 75 75 µs NOISE Voltage Noise, 1 kHz RTI 7 7 nV/√Hz RTO 90 90 nV√Hz RTI, 0.1 Hz to 10 Hz G = 1 15 15 µV p-p G = 10 2 2 µV p-p G = 100, 1000 0.3 0.3 µV p-p Current Noise 0.1 Hz to 10 Hz 60 60 pA p-p SENSE INPUT RIN 20 20 kΩ ± 20% IIN 15 15 µA Voltage Range ±10 ±10 V Gain to Output 1 1 % Rev. G | Page 6 of 25 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS CONNECTION DIAGRAMS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION INPUT PROTECTION INPUT OFFSET AND OUTPUT OFFSET GAIN INPUT BIAS CURRENTS COMMON-MODE REJECTION GROUNDING SENSE TERMINAL REFERENCE TERMINAL PROGRAMMABLE GAIN AUTO-ZERO CIRCUITS ERROR BUDGET ANALYSIS REFERENCES OUTLINE DIMENSIONS ORDERING GUIDE