Datasheet LMR1901YG-M (Rohm) - 5
| Manufacturer | Rohm |
| Description | Automotive Ultra Low Power Low Offset Voltage Rail-to-Rail Input/Output CMOS Operational Amplifiers |
| Pages / Page | 24 / 5 — LMR1901YG-M. Electrical Characteristics - continued |
| File Format / Size | PDF / 2.1 Mb |
| Document Language | English |
LMR1901YG-M. Electrical Characteristics - continued
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LMR1901YG-M Electrical Characteristics - continued (Unless otherwise specified VS = 5 V, VSS = 0 V, VICM = 2.5 V, Ta = 25 °C)
Limit Parameter Symbol Unit Conditions Min Typ Max - 0.01 0.55 No load, Absolute value Input Offset Voltage VIO mV - No load, Absolute value, - 0.75 Ta = -40 °C to +105 °C Input Offset Voltage ΔV No load, Absolute value, Temperature Drift IO/ΔT - 0.6 7.0 μV/°C Ta = -40 °C to +105 °C Input Offset Current IIO - 0 - pA Absolute value Input Bias Current IB - 0.5 - pA Absolute value Common-mode Input Voltage V Range ICMR 0 - 5 V VSS to V DD - 175 280 No load, G = 0 dB Supply Current IDD nA - No load, G = 0 dB, - 380 Ta = -40 °C to +105 °C RL = 100 kΩ Output Voltage High VOH - 2.5 60 mV VOH = VDD - VOUT Ta = -40 °C to +105 °C Output Voltage Low R V L = 100 kΩ OL - 1 30 mV Ta = -40 °C to +105 °C Output Source Current (Note 1) IOH 10 20 - mA VOUT = VSS, Absolute value Output Sink Current (Note 1) IOL 18 35 - mA VOUT = VDD, Absolute value 80 135 - - Large Signal Voltage Gain AV dB 75 - - Ta = -40 °C to +105 °C Gain Bandwidth Product GBW - 1 - kHz G = 20 dB, CL = 25 pF Phase Margin θ - 70 - deg G = 20 dB, CL = 25 pF Common-mode Rejection Ratio CMRR 60 115 - dB - Power Supply Rejection Ratio PSRR 70 100 - dB - Slew Rate SR - 0.3 - V/ms CL = 25 pF Input-referred Noise Voltage Density Vn - 690 - nV/√Hz f = 10 Hz (Note 1) Consider the power dissipation of the IC under high temperature environment when selecting the output current value. When the output pin is short-circuited continuously, the output current may decrease due to the temperature rise by the heat generation of inside the IC.
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TSZ02201-0GLG2G800170-1-2
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© 2023 ROHM Co., Ltd. All rights reserved. /21 TSZ22111 • 15 • 001
04.Aug.2023 Rev.001
Document Outline General Description Features Applications Key Specifications Package Typical Application Circuit Pin Configuration Block Diagram Description of Blocks Absolute Maximum Ratings Thermal Resistance Recommended Operating Conditions Function Explanation Electrical Characteristics Typical Performance Curves Figure 1. Supply Current vs Supply Voltage Figure 2. Supply Current vs Ambient Temperature Figure 3. Output Voltage High vs Supply Voltage Figure 4. Output Voltage High vs Ambient Temperature Figure 5. Output Voltage Low vs Supply Voltage Figure 6. Output Voltage Low vs Ambient Temperature Figure 7. Output Source Current vs Output Voltage Figure 8. Output Sink Current vs Output Voltage Figure 9. Output Source Current vs Output Voltage Figure 10. Output Sink Current vs Output Voltage Figure 11. Input Offset Voltage vs Supply Voltage Figure 12. Input Offset Voltage vs Ambient Temperature Figure 13. Input Offset Voltage vs Supply Voltage Figure 14. Input Offset Voltage vs Ambient Temperature Figure 15. Input Offset Voltage vs Common-mode Input Voltage Figure 16. Input Offset Voltage vs Common-mode Input Voltage Figure 17. Large Signal Voltage Gain vs Supply Voltage Figure 18. Large Signal Voltage Gain vs Ambient Temperature Figure 19. Common-mode Rejection Ratio vs Supply Voltage Figure 20. Common-mode Rejection Ratio vs Ambient Temperature Figure 21. Power Supply Rejection Ratio vs Ambient Temperature Figure 22. Input Bias Current vs Ambient Temperature Figure 23. Input-referred Noise Voltage Density vs Frequency Figure 24. Input-referred Noise Voltage Density vs Frequency Figure 25. Slew Rate vs Supply Voltage Figure 26. Slew Rate vs Ambient Temperature Figure 27. Slew Rate vs Ambient Temperature Figure 28. Gain Bandwidth Product vs Ambient Temperature Figure 29. Phase Margin vs Load Capacitance Figure 30. Phase Margin vs Load Capacitance Figure 31. Voltage Gain, Phase vs Frequency Figure 32. Voltage Gain, Phase vs Frequency Figure 33. Large-Signal Step Response Figure 34. Large-Signal Step Response Application Examples I/O Equivalence Circuits Operational Notes 1. Reverse Connection of Power Supply 2. Power Supply Lines 3. Ground Voltage 4. Ground Wiring Pattern 5. Recommended Operating Conditions 6. Inrush Current 7. Testing on Application Boards 8. Inter-pin Short and Mounting Errors 9. Unused Input Pins 10. Regarding the Input Pin of the IC 11. Ceramic Capacitor Ordering Information Marking Diagram Physical Dimension and Packing Information Revision History
Limit Parameter Symbol Unit Conditions Min Typ Max - 0.01 0.55 No load, Absolute value Input Offset Voltage VIO mV - No load, Absolute value, - 0.75 Ta = -40 °C to +105 °C Input Offset Voltage ΔV No load, Absolute value, Temperature Drift IO/ΔT - 0.6 7.0 μV/°C Ta = -40 °C to +105 °C Input Offset Current IIO - 0 - pA Absolute value Input Bias Current IB - 0.5 - pA Absolute value Common-mode Input Voltage V Range ICMR 0 - 5 V VSS to V DD - 175 280 No load, G = 0 dB Supply Current IDD nA - No load, G = 0 dB, - 380 Ta = -40 °C to +105 °C RL = 100 kΩ Output Voltage High VOH - 2.5 60 mV VOH = VDD - VOUT Ta = -40 °C to +105 °C Output Voltage Low R V L = 100 kΩ OL - 1 30 mV Ta = -40 °C to +105 °C Output Source Current (Note 1) IOH 10 20 - mA VOUT = VSS, Absolute value Output Sink Current (Note 1) IOL 18 35 - mA VOUT = VDD, Absolute value 80 135 - - Large Signal Voltage Gain AV dB 75 - - Ta = -40 °C to +105 °C Gain Bandwidth Product GBW - 1 - kHz G = 20 dB, CL = 25 pF Phase Margin θ - 70 - deg G = 20 dB, CL = 25 pF Common-mode Rejection Ratio CMRR 60 115 - dB - Power Supply Rejection Ratio PSRR 70 100 - dB - Slew Rate SR - 0.3 - V/ms CL = 25 pF Input-referred Noise Voltage Density Vn - 690 - nV/√Hz f = 10 Hz (Note 1) Consider the power dissipation of the IC under high temperature environment when selecting the output current value. When the output pin is short-circuited continuously, the output current may decrease due to the temperature rise by the heat generation of inside the IC.
www.rohm.com
TSZ02201-0GLG2G800170-1-2
5
© 2023 ROHM Co., Ltd. All rights reserved. /21 TSZ22111 • 15 • 001
04.Aug.2023 Rev.001
Document Outline General Description Features Applications Key Specifications Package Typical Application Circuit Pin Configuration Block Diagram Description of Blocks Absolute Maximum Ratings Thermal Resistance Recommended Operating Conditions Function Explanation Electrical Characteristics Typical Performance Curves Figure 1. Supply Current vs Supply Voltage Figure 2. Supply Current vs Ambient Temperature Figure 3. Output Voltage High vs Supply Voltage Figure 4. Output Voltage High vs Ambient Temperature Figure 5. Output Voltage Low vs Supply Voltage Figure 6. Output Voltage Low vs Ambient Temperature Figure 7. Output Source Current vs Output Voltage Figure 8. Output Sink Current vs Output Voltage Figure 9. Output Source Current vs Output Voltage Figure 10. Output Sink Current vs Output Voltage Figure 11. Input Offset Voltage vs Supply Voltage Figure 12. Input Offset Voltage vs Ambient Temperature Figure 13. Input Offset Voltage vs Supply Voltage Figure 14. Input Offset Voltage vs Ambient Temperature Figure 15. Input Offset Voltage vs Common-mode Input Voltage Figure 16. Input Offset Voltage vs Common-mode Input Voltage Figure 17. Large Signal Voltage Gain vs Supply Voltage Figure 18. Large Signal Voltage Gain vs Ambient Temperature Figure 19. Common-mode Rejection Ratio vs Supply Voltage Figure 20. Common-mode Rejection Ratio vs Ambient Temperature Figure 21. Power Supply Rejection Ratio vs Ambient Temperature Figure 22. Input Bias Current vs Ambient Temperature Figure 23. Input-referred Noise Voltage Density vs Frequency Figure 24. Input-referred Noise Voltage Density vs Frequency Figure 25. Slew Rate vs Supply Voltage Figure 26. Slew Rate vs Ambient Temperature Figure 27. Slew Rate vs Ambient Temperature Figure 28. Gain Bandwidth Product vs Ambient Temperature Figure 29. Phase Margin vs Load Capacitance Figure 30. Phase Margin vs Load Capacitance Figure 31. Voltage Gain, Phase vs Frequency Figure 32. Voltage Gain, Phase vs Frequency Figure 33. Large-Signal Step Response Figure 34. Large-Signal Step Response Application Examples I/O Equivalence Circuits Operational Notes 1. Reverse Connection of Power Supply 2. Power Supply Lines 3. Ground Voltage 4. Ground Wiring Pattern 5. Recommended Operating Conditions 6. Inrush Current 7. Testing on Application Boards 8. Inter-pin Short and Mounting Errors 9. Unused Input Pins 10. Regarding the Input Pin of the IC 11. Ceramic Capacitor Ordering Information Marking Diagram Physical Dimension and Packing Information Revision History
