Datasheet AD7091 (Analog Devices)
| Manufacturer | Analog Devices |
| Description | 1 MSPS, Ultralow Power 12-Bit ADC in 8-Lead LFCSP |
| Pages / Page | 20 / 1 — 1 MSPS, Ultralow Power,. 12-Bit ADC in 8-Lead LFCSP. Data Sheet. AD7091. … |
| Revision | B |
| File Format / Size | PDF / 469 Kb |
| Document Language | English |
1 MSPS, Ultralow Power,. 12-Bit ADC in 8-Lead LFCSP. Data Sheet. AD7091. FEATURES. FUNCTIONAL BLOCK DIAGRAM
Model Line for this Datasheet
Text Version of Document
1 MSPS, Ultralow Power, 12-Bit ADC in 8-Lead LFCSP Data Sheet AD7091 FEATURES FUNCTIONAL BLOCK DIAGRAM Fast throughput rate of 1 MSPS REGCAP VDD Specified for VDD of 2.09 V to 5.25 V AD7091 INL of ±1 LSB maximum Analog input range of 0 V to VDD SDO 12-BIT SERIAL Ultralow power V T/H IN SAR INTERFACE SCLK ADC 367 µA typical at 3 V and 1 MSPS CS 324 nA typical at 3 V in power-down mode Reference provided by V CLK DD CONVERSION OSC Flexible power/throughput rate management CONTROL LOGIC CONVST High speed serial interface: SPI®-/QSPI™-/MICROWIRE®-/
001
DSP-compatible GND
10494-
Busy indicator
Figure 1.
Power-down mode 1100 V 8-lead, 2 mm × 2 mm LFCSP package DD = 3V 1000 Temperature range: −40°C to +125°C 900 APPLICATIONS 800 ) 700 Battery-powered systems W Handheld meters (μ 600 ER Medical instruments 500 W PO Mobile communications 400 Instrumentation and control systems 300 Data acquisition systems 200 Optical sensors 100 Diagnostic/monitoring functions 0 Energy harvesting 0 200 400 600 800 1000
002
THROUGHPUT RATE (kSPS)
10494- Figure 2. Power Dissipation vs. Throughput Rate
GENERAL DESCRIPTION
The AD7091 is a 12-bit successive approximation register The reference is derived internally from VDD. This design allows analog-to-digital converter (SAR ADC) that offers ultralow the widest dynamic input range to the ADC; that is, the analog power consumption (typical y 367 µA at 3 V and 1 MSPS) while input range for the AD7091 is from 0 V to VDD. achieving fast throughput rates (1 MSPS with a 50 MHz SCLK).
PRODUCT HIGHLIGHTS
The AD7091 operates from a single 2.09 V to 5.25 V power supply. The AD7091 also features an on-chip conversion clock 1. Lowest Power 12-Bit SAR ADC Available. and a high speed serial interface. 2. High Throughput Rate with Ultralow Power Consumption. 3. Flexible Power/Throughput Rate Management. The conversion process and data acquisition are controlled using Average power scales with the throughput rate. Power-down a CONVST signal and an internal oscillator. The AD7091 has a mode al ows the average power consumption to be reduced serial interface that al ows data to be read after the conversion when the device is not performing a conversion. while achieving a 1 MSPS throughput rate. The AD7091 uses 4. Reference Derived from the Power Supply. advanced design and process techniques to achieve very low 5. Single-Supply Operation. power dissipation at high throughput rates.
Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2012–2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT MODES OF OPERATION Normal Mode Power-Down Mode POWER CONSUMPTION Power Consumption in Normal Mode Power Consumption Using a Combination of Normal Mode and Power-Down Mode MULTIPLEXER APPLICATIONS SERIAL INTERFACE BUSY INDICATOR ENABLED BUSY INDICATOR DISABLED SOFTWARE RESET INTERFACING WITH AN 8-/16-BIT SPI BUS OUTLINE DIMENSIONS ORDERING GUIDE
001
DSP-compatible GND
10494-
Busy indicator
Figure 1.
Power-down mode 1100 V 8-lead, 2 mm × 2 mm LFCSP package DD = 3V 1000 Temperature range: −40°C to +125°C 900 APPLICATIONS 800 ) 700 Battery-powered systems W Handheld meters (μ 600 ER Medical instruments 500 W PO Mobile communications 400 Instrumentation and control systems 300 Data acquisition systems 200 Optical sensors 100 Diagnostic/monitoring functions 0 Energy harvesting 0 200 400 600 800 1000
002
THROUGHPUT RATE (kSPS)
10494- Figure 2. Power Dissipation vs. Throughput Rate
GENERAL DESCRIPTION
The AD7091 is a 12-bit successive approximation register The reference is derived internally from VDD. This design allows analog-to-digital converter (SAR ADC) that offers ultralow the widest dynamic input range to the ADC; that is, the analog power consumption (typical y 367 µA at 3 V and 1 MSPS) while input range for the AD7091 is from 0 V to VDD. achieving fast throughput rates (1 MSPS with a 50 MHz SCLK).
PRODUCT HIGHLIGHTS
The AD7091 operates from a single 2.09 V to 5.25 V power supply. The AD7091 also features an on-chip conversion clock 1. Lowest Power 12-Bit SAR ADC Available. and a high speed serial interface. 2. High Throughput Rate with Ultralow Power Consumption. 3. Flexible Power/Throughput Rate Management. The conversion process and data acquisition are controlled using Average power scales with the throughput rate. Power-down a CONVST signal and an internal oscillator. The AD7091 has a mode al ows the average power consumption to be reduced serial interface that al ows data to be read after the conversion when the device is not performing a conversion. while achieving a 1 MSPS throughput rate. The AD7091 uses 4. Reference Derived from the Power Supply. advanced design and process techniques to achieve very low 5. Single-Supply Operation. power dissipation at high throughput rates.
Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2012–2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT MODES OF OPERATION Normal Mode Power-Down Mode POWER CONSUMPTION Power Consumption in Normal Mode Power Consumption Using a Combination of Normal Mode and Power-Down Mode MULTIPLEXER APPLICATIONS SERIAL INTERFACE BUSY INDICATOR ENABLED BUSY INDICATOR DISABLED SOFTWARE RESET INTERFACING WITH AN 8-/16-BIT SPI BUS OUTLINE DIMENSIONS ORDERING GUIDE
