TPH3R70APL
MOSFETs Silicon N-channel MOS (U-MOSоЂґ-H) TPH3R70APL
1. Applications High-Efficiency DC-DC Converters Switching Voltage Regulators Motor Drivers 2. Features
(1) High-speed switching (2) Small gate charge: QSW = 21 nC (typ.) (3) Small output charge: Qoss = 74 nC (typ.) (4) Low drain-source on-resistance: RDS(ON) = 3.1 mΩ (typ.) (VGS = 10 V) (5) Low leakage current: IDSS = 10 µA (max) (VDS = 100 V) (6) Enhancement mode: Vth = 1.5 to 2.5 V (VDS = 10 V, ID = 1 mA) 3. Packaging and Internal Circuit 1, 2, 3: Source
4: Gate
5, 6, 7, 8: Drain SOP Advance Start of commercial production
В©2017
Toshiba Electronic Devices & Storage Corporation 1 2017-10
2017-10-01
Rev.3.0 TPH3R70APL
4. Absolute Maximum Ratings (Note) (Ta = 25 оЂЊ unless otherwise specified)
Characteristics Symbol Rating Unit Drain-source voltage VDSS 100 V Gate-source voltage VGSS В±20 Drain current (DC) (Tc = 25 оЂЊ) (Note 1) ID 90 Drain current (DC) (Silicon limit) (Note 1), (Note 2) ID 150 Drain current (pulsed) (t = 100 Вµs) (Note 1) IDP 500 Power dissipation (Tc = 25 оЂЊ) PD 170 A W Power dissipation (Note 3) PD 3 Power dissipation (Note 4) PD 0.96 Single-pulse avalanche energy (Note 5) EAS 150 mJ Single-pulse avalanche current (Note 5) IAS 90 A
оЂЊ Channel temperature Tch 175 Storage temperature Tstg -55 to 175 Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc). 5. Thermal Characteristics
Characteristics Symbol Max Unit
оЂЊ/W Channel-to-case thermal resistance (Tc = 25 оЂЊ) Rth(ch-c) 0.88 Channel-to-ambient thermal resistance (Ta = 25 оЂЊ) (Note 3) Rth(ch-a) 50 Channel-to-ambient thermal resistance (Ta = 25 оЂЊ) (Note 4) Rth(ch-a) 156 Note 1: Ensure that the channel temperature does not exceed 175 оЂЊ.
Note 2: Limited by silicon chip capability.
Note 3: Device mounted on a glass-epoxy board (a), Figure 5.1 …
