Datasheet LTC1090 (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | Single Chip 10-Bit Data Acquisition System |
| Pages / Page | 28 / 3 — CO VERTER A D ULTIPLEXER CHARACTERISTICS The. denotes specifications which |
| File Format / Size | PDF / 356 Kb |
| Document Language | English |
CO VERTER A D ULTIPLEXER CHARACTERISTICS The. denotes specifications which
Model Line for this Datasheet
Text Version of Document
LTC1090
U U W CO VERTER A D ULTIPLEXER CHARACTERISTICS The
●
denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25
°
C. (Note 3) LTC1090A LTC1090 PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Offset Error (Note 4) ● ±0.5 ±0.5 LSB Linearity Error (Notes 4 and 5) ● ±0.5 ±0.5 LSB Gain Error (Note 4) ● ±1.0 ±2.0 LSB Total Unadjusted Error VREF = 5.000V ● ±1.0 LSB (Notes 4 and 6) Reference Input Resistance 10 10 kΩ Analog and REF Input Range (Note 7) (V–) – 0.05V to VCC 0.05V V On Channel Leakage Current On Channel = 5V ● 1 1 µA (Note 8) Off Channel = 0V On Channel = 0V ● –1 –1 µA Off Channel = 5V Off Channel Leakage Current On Channel = 5V ● –1 –1 µA (Note 8) Off Channel = 0V On Channel = 0V ● 1 1 µA Off Channel = 5V
AC ELECTRICAL CHARACTERISTICS The
●
denotes specifications which apply over the full operating temperature range, otherwise specification are TA = 25
°
C. (Note 3) LTC1090/LTC1090A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
tACC Delay Time From CS↓ to DOUT Data Valid (Note 9) 2 ACLK Cycles tSMPL Analog Input Sample Time See Operating Sequence 5 SCLK Cycles tCONV Conversion Time See Operating Sequence 44 ACLK Cycles tdDO Delay Time, SCLK↓ to DOUT Data Valid See Test Circuits ● 250 450 ns tdis Delay Time, CS↑ to DOUT Hi-Z See Test Circuits ● 140 300 ns ns ten Delay Time, 2nd CLK↓ to DOUT Enabled See Test Circuits ● 150 400 ns ns thDO Time Output Data Remains Valid After SCLK↓ 50 ns tf DOUT Fall Time See Test Circuits ● 90 300 ns ns tr DOUT Rise Time See Test Circuits ● 60 300 ns ns CIN Input Capacitance Analog Inputs On Channel 65 pF Off Channel 5 pF Digital Inputs 5 pF 1090fc 3
U U W CO VERTER A D ULTIPLEXER CHARACTERISTICS The
●
denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25
°
C. (Note 3) LTC1090A LTC1090 PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Offset Error (Note 4) ● ±0.5 ±0.5 LSB Linearity Error (Notes 4 and 5) ● ±0.5 ±0.5 LSB Gain Error (Note 4) ● ±1.0 ±2.0 LSB Total Unadjusted Error VREF = 5.000V ● ±1.0 LSB (Notes 4 and 6) Reference Input Resistance 10 10 kΩ Analog and REF Input Range (Note 7) (V–) – 0.05V to VCC 0.05V V On Channel Leakage Current On Channel = 5V ● 1 1 µA (Note 8) Off Channel = 0V On Channel = 0V ● –1 –1 µA Off Channel = 5V Off Channel Leakage Current On Channel = 5V ● –1 –1 µA (Note 8) Off Channel = 0V On Channel = 0V ● 1 1 µA Off Channel = 5V
AC ELECTRICAL CHARACTERISTICS The
●
denotes specifications which apply over the full operating temperature range, otherwise specification are TA = 25
°
C. (Note 3) LTC1090/LTC1090A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
tACC Delay Time From CS↓ to DOUT Data Valid (Note 9) 2 ACLK Cycles tSMPL Analog Input Sample Time See Operating Sequence 5 SCLK Cycles tCONV Conversion Time See Operating Sequence 44 ACLK Cycles tdDO Delay Time, SCLK↓ to DOUT Data Valid See Test Circuits ● 250 450 ns tdis Delay Time, CS↑ to DOUT Hi-Z See Test Circuits ● 140 300 ns ns ten Delay Time, 2nd CLK↓ to DOUT Enabled See Test Circuits ● 150 400 ns ns thDO Time Output Data Remains Valid After SCLK↓ 50 ns tf DOUT Fall Time See Test Circuits ● 90 300 ns ns tr DOUT Rise Time See Test Circuits ● 60 300 ns ns CIN Input Capacitance Analog Inputs On Channel 65 pF Off Channel 5 pF Digital Inputs 5 pF 1090fc 3
