Datasheet LTC2269 (Analog Devices)
| Manufacturer | Analog Devices |
| Description | 16-Bit, 20Msps Low Noise ADC |
| Pages / Page | 32 / 1 — FEATURES. DESCRIPTION. APPLICATIONS. TYPICAL APPLICATION. Integral … |
| File Format / Size | PDF / 775 Kb |
| Document Language | English |
FEATURES. DESCRIPTION. APPLICATIONS. TYPICAL APPLICATION. Integral Non-Linearity (INL)
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LTC2269 16-Bit, 20Msps Low Noise ADC
FEATURES DESCRIPTION
n 84.1dB SNR (46μVRMS Input Referred Noise) The LTC®2269 is a sampling 16-bit A/D converter designed n 99dB SFDR for digitizing high frequency, wide dynamic range signals. n ±2.3LSB INL(Maximum) It is perfect for demanding communications applications n Low Power: 88mW with AC performance that includes 84.1dB SNR and 99dB n Single 1.8V Supply spurious free dynamic range (SFDR). n CMOS, DDR CMOS, or DDR LVDS Outputs DC specs include ±1LSB INL (typ), ±0.2LSB DNL (typ) n Selectable Input Ranges: 1VP-P to 2.1VP-P and no missing codes over temperature. The transition n 200MHz Full Power Bandwidth S/H noise is 1.44LSBRMS. n Shutdown and Nap Modes n Serial SPI Port for Configuration The digital outputs can be either full rate CMOS, double n Pin Compatible with data rate CMOS, or double data rate LVDS. A separate LTC2160:16-Bit, 25Msps, 45mW output power supply allows the CMOS output swing to n 48-Lead (7mm range from 1.2V to 1.8V. × 7mm) QFN Package The ENC+ and ENC– inputs may be driven differentially
APPLICATIONS
or single-ended with a sine wave, PECL, LVDS, TTL, or n Low Power Instrumentation CMOS inputs. An optional clock duty cycle stabilizer al- n Software Defined Radios lows high performance at full speed for a wide range of n Portable Medical Imaging clock duty cycles. n Multichannel Data Acquisition L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION Integral Non-Linearity (INL)
1.8V 1.8V VDD OVDD 2.0 1.5 1.0 ANALOG 16-BIT S/H INPUT ADC CORE 0.5 D15 t CMOS 0.0 OUTPUT t DDR CMOS OR DRIVERS t DDR LVDS –0.5 OUTPUTS INL ERROR (LSB) D0 –1.0 20MHz CLOCK CONTROL –1.5 CLOCK –2.0 0 16384 32768 49152 65536 OUTPUT CODE 2269 TA01 GND OGND 2269 TA02 2269f 1
FEATURES DESCRIPTION
n 84.1dB SNR (46μVRMS Input Referred Noise) The LTC®2269 is a sampling 16-bit A/D converter designed n 99dB SFDR for digitizing high frequency, wide dynamic range signals. n ±2.3LSB INL(Maximum) It is perfect for demanding communications applications n Low Power: 88mW with AC performance that includes 84.1dB SNR and 99dB n Single 1.8V Supply spurious free dynamic range (SFDR). n CMOS, DDR CMOS, or DDR LVDS Outputs DC specs include ±1LSB INL (typ), ±0.2LSB DNL (typ) n Selectable Input Ranges: 1VP-P to 2.1VP-P and no missing codes over temperature. The transition n 200MHz Full Power Bandwidth S/H noise is 1.44LSBRMS. n Shutdown and Nap Modes n Serial SPI Port for Configuration The digital outputs can be either full rate CMOS, double n Pin Compatible with data rate CMOS, or double data rate LVDS. A separate LTC2160:16-Bit, 25Msps, 45mW output power supply allows the CMOS output swing to n 48-Lead (7mm range from 1.2V to 1.8V. × 7mm) QFN Package The ENC+ and ENC– inputs may be driven differentially
APPLICATIONS
or single-ended with a sine wave, PECL, LVDS, TTL, or n Low Power Instrumentation CMOS inputs. An optional clock duty cycle stabilizer al- n Software Defined Radios lows high performance at full speed for a wide range of n Portable Medical Imaging clock duty cycles. n Multichannel Data Acquisition L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION Integral Non-Linearity (INL)
1.8V 1.8V VDD OVDD 2.0 1.5 1.0 ANALOG 16-BIT S/H INPUT ADC CORE 0.5 D15 t CMOS 0.0 OUTPUT t DDR CMOS OR DRIVERS t DDR LVDS –0.5 OUTPUTS INL ERROR (LSB) D0 –1.0 20MHz CLOCK CONTROL –1.5 CLOCK –2.0 0 16384 32768 49152 65536 OUTPUT CODE 2269 TA01 GND OGND 2269 TA02 2269f 1
