Datasheet LTC2269 (Analog Devices) - 4

ManufacturerAnalog Devices
Description16-Bit, 20Msps Low Noise ADC
Pages / Page32 / 4 — CONVERTER CHARACTERISTICS. The. denotes the specifications which apply …
File Format / SizePDF / 775 Kb
Document LanguageEnglish

CONVERTER CHARACTERISTICS. The. denotes the specifications which apply over the full operating

CONVERTER CHARACTERISTICS The denotes the specifications which apply over the full operating

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LTC2269
CONVERTER CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. PARAMETER CONDITIONS MIN TYP MAX UNITS
Resolution (No Missing Codes) l 16 Bits Integral Linearity Error Differential Analog Input l –2.3 ±1 2.3 LSB (Note 6) Differential Linearity Error Differential Analog Input l –0.8 ±0.2 0.8 LSB Offset Error (Note 7) l –7 ±1.3 7 mV Gain Error Internal Reference ±1.2 %FS External Reference l –1.5 –0.2 1.1 %FS Offset Drift ±10 μV/°C Full-Scale Drift Internal Reference ±30 ppm/°C External Reference ±10 ppm/°C Transition Noise External Reference 1.44 LSBRMS
ANALOG INPUT The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V + – IN Analog Input Range (AIN – AIN ) 1.7V < VDD < 1.9V l 1 to 2.1 VP-P V + – IN(CM) Analog Input Common Mode (AIN + AIN )/2 Differential Analog Input (Note 8) l 0.65 VCM VCM + 200mV V VSENSE External Voltage Reference Applied to SENSE External Reference Mode l 0.625 1.250 1.300 V IINCM Analog Input Common Mode Current Per Pin, 20Msps 32 μA I + – IN1 Analog Input Leakage Current (No Encode) 0 < AIN , AIN < VDD l –1 1 μA IIN2 PAR/SER Input Leakage Current 0 < PAR/SER < VDD l –1 1 μA IIN3 SENSE Input Leakage Current 0.625 < SENSE < 1.3V l –2 2 μA tAP Sample-and-Hold Acquisition Delay Time 0 ns tJITTER Sample-and-Hold Acquisition Delay Jitter Single-Ended Encode 85 fsRMS Differential Encode 100 fsRMS CMRR Analog Input Common Mode Rejection Ratio 80 dB BW-3B Full Power Bandwidth Figure 5 Test Circuit 200 MHz
DYNAMIC ACCURACY The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. AIN = –1dBFS. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
SNR Signal-to-Noise Ratio 1.4MHz Input 84.1 dBFS 5MHz Input l 82.1 84.1 dBFS 30MHz Input 83.8 dBFS 70MHz Input 82.7 dBFS SFDR Spurious Free Dynamic Range 1.4MHz Input 99 dBFS 2nd Harmonic 5MHz Input l 90 98 dBFS 30MHz Input 98 dBFS 70MHz Input 90 dBFS 2269f 4
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