link to page 17 link to page 18 link to page 27 AD9480PIN CONFIGURATION AND FUNCTION DESCRIPTIONSAGNDNCLVDSBIASAVDDAGNDVIN+VIN–AGNDAVDDAGNDVREF44 43 424140 39 3837363534CLK+133SENSECLK–2PIN 132AGNDAVDD331AVDDAGND430AGNDAD9480DRVDD529PDWNTOP VIEWDRGND6(Not to Scale)28S1D0_C (LSB)727DRGNDD0_T (LSB)826D7_T (MSB)D1_C925D7_C (MSB)D1_T 1024D6_TD2_C 1123 D6_C12 13 141516 17 1819202122NC = NO CONNECT–2_T3_C3_T4_C4_T5_C5_T 003 DDDDCODCO+DDDDDRGNDDRVDD 04619- Figure 3. Pin Configuration Table 7. Pin Function Descriptions PinPinNo. MnemonicDescriptionNo. Mnemonic Description 1 CLK+ Input Clock—True 23 D6_C Data Output Bit 6—Complement 2 CLK− Input Clock—Complement 24 D6_T Data Output Bit 6—True 3 AVDD 3.3 V Analog Supply 25 D7_C Data Output Bit 7—Complement (MSB) 4 AGND Analog Ground 26 D7_T Data Output Bit 7—True (MSB) 5 DRVDD 3.3 V Digital Output Supply 27 DRGND Digital Ground 6 DRGND Digital Ground 28 S1 Data Format Select and Duty-Cycle Stabilizer Selection (See Table 8) 7 D0_C Data Output Bit 0—Complement (LSB) 29 PDWN Power-Down Selection (AVDD = Power Down) 8 D0_T Data Output Bit 0—True (LSB) 30 AGND Analog Ground 9 D1_C Data Output Bit 1—Complement 31 AVDD 3.3 V Analog Supply 10 D1_T Data Output Bit 1—True 32 AGND Analog Ground 11 D2_C Data Output Bit 2—Complement 33 SENSE Reference Mode Selection (See Table 9) 12 D2_T Data Output Bit 2—True 34 VREF Voltage Reference Input/Output 13 D3_C Data Output Bit 3—Complement 35 AGND Analog Ground 14 D3_T Data Output Bit 3—True 36 AVDD 3.3 V Analog Supply 15 DRGND Digital Ground 37 AGND Analog Ground 16 DCO− Data Clock Output—Complement 38 VIN− Analog Input—Complement 17 DCO+ Data Clock Output—True 39 VIN+ Analog Input—True 18 DRVDD 3.3 V Digital Output Supply 40 AGND Analog Ground 19 D4_C Data Output Bit 4—Complement 41 AVDD 3.3 V Analog Supply 20 D4_T Data Output Bit 4—True 42 LVDSBIAS LVDS Output Current Adjust 21 D5_C Data Output Bit 5—Complement 43 NC1 No Connect (Leave Floating) 22 D5_T Data Output Bit 5—True 44 AGND Analog Ground 1 Pin 43 will self-bias to 1.5 V. It can be left floating (as recommended) or tied to AVDD or ground with no ill effects. Rev. A | Page 8 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY DC SPECIFICATIONS DIGITAL SPECIFICATIONS AC SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS APPLICATION NOTES CLOCKING THE AD9480 ANALOG INPUTS VOLTAGE REFERENCE Fixed Reference External Reference Programmable Reference DIGITAL OUTPUTS OUTPUT CODING INTERLEAVING TWO AD9480s DATA CLOCK OUT POWER-DOWN AD9480 EVALUATION BOARD POWER CONNECTOR ANALOG INPUTS GAIN OPTIONAL OPERATIONAL AMPLIFIER CLOCK OPTIONAL CLOCK BUFFER OPTIONAL XTAL VOLTAGE REFERENCE DATA OUTPUTS EVALUATION BOARD BILL OF MATERIALS (BOM) PCB SCHEMATICS PCB LAYERS OUTLINE DIMENSIONS ORDERING GUIDE