Datasheet Texas Instruments ADS5407
| Manufacturer | Texas Instruments |
| Series | ADS5407 |
Dual-Channel, 12-Bit, 500-MSPS Analog-to-Digital Converter (ADC)
Datasheets
Dual Channel 12-Bit 500 Msps Analog to Digital Converter datasheet
PDF, 1.4 Mb, Revision: B, File published: Jan 8, 2014
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Prices
Status
| ADS5407IZAY | ADS5407IZAYR | |
|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | Yes |
Packaging
| ADS5407IZAY | ADS5407IZAYR | |
|---|---|---|
| N | 1 | 2 |
| Pin | 196 | 196 |
| Package Type | ZAY | ZAY |
| Industry STD Term | NFBGA | NFBGA |
| JEDEC Code | S-PBGA-N | S-PBGA-N |
| Package QTY | 160 | 1000 |
| Carrier | JEDEC TRAY (5+1) | LARGE T&R |
| Device Marking | ADS5407I | ADS5407I |
| Width (mm) | 12 | 12 |
| Length (mm) | 12 | 12 |
| Thickness (mm) | .9 | .9 |
| Pitch (mm) | .8 | .8 |
| Max Height (mm) | 1.4 | 1.4 |
| Mechanical Data | Download | Download |
Parametrics
| Parameters / Models | ADS5407IZAY | ADS5407IZAYR |
|---|---|---|
| # Input Channels | 2 | 2 |
| Analog Input BW, MHz | 1000 | 1000 |
| Architecture | Pipeline | Pipeline |
| DNL(Max), +/-LSB | 2 | 2 |
| DNL(Typ), +/-LSB | 0.8 | 0.8 |
| ENOB, Bits | 10.3 | 10.3 |
| INL(Max), +/-LSB | 5 | 5 |
| INL(Typ), +/-LSB | 2 | 2 |
| Input Buffer | No | No |
| Input Range, Vp-p | 1 | 1 |
| Interface | DDR LVDS | DDR LVDS |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 |
| Package Group | NFBGA | NFBGA |
| Package Size: mm2:W x L, PKG | 196NFBGA: 144 mm2: 12 x 12(NFBGA) | 196NFBGA: 144 mm2: 12 x 12(NFBGA) |
| Power Consumption(Typ), mW | 1350 | 1350 |
| Rating | Catalog | Catalog |
| Reference Mode | Ext,Int | Ext,Int |
| Resolution, Bits | 12 | 12 |
| SFDR, dB | 84 | 84 |
| SINAD, dB | 63.4 | 63.4 |
| SNR, dB | 63.8 | 63.8 |
| Sample Rate(Max), MSPS | 500 | 500 |
Eco Plan
| ADS5407IZAY | ADS5407IZAYR | |
|---|---|---|
| RoHS | Compliant | Compliant |
Application Notes
- Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)PDF, 1.2 Mb, Revision: A, File published: Jul 19, 2013
- Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)PDF, 2.0 Mb, Revision: A, File published: May 22, 2015
- Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, Revision: A, File published: May 18, 2015
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, Revision: B, File published: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, Revision: A, File published: Apr 16, 2015
Model Line
Series: ADS5407 (2)
Manufacturer's Classification
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)
