Datasheet Texas Instruments ADS7263

ManufacturerTexas Instruments
SeriesADS7263
Datasheet Texas Instruments ADS7263

14-bit 1MSPS 4x2/2x2 Simultaneous Sampling SAR ADC

Datasheets

ADSxxx3 Dual, 1-MSPS, 16-, 14-, and 12-Bit, 4Г—2 or 2Г—2 Channel, Simultaneous Sampling Analog-to-Digital Converter datasheet
PDF, 1.4 Mb, Revision: D, File published: Sep 2, 2017
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Prices

Status

ADS7263SRHBRADS7263SRHBT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNo

Packaging

ADS7263SRHBRADS7263SRHBT
N12
Pin3232
Package TypeRHBRHB
Industry STD TermVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-N
Package QTY3000250
CarrierLARGE T&RSMALL T&R
Device Marking72637263
Width (mm)55
Length (mm)55
Thickness (mm).9.9
Pitch (mm).5.5
Max Height (mm)11
Mechanical DataDownloadDownload

Parametrics

Parameters / ModelsADS7263SRHBR
ADS7263SRHBR
ADS7263SRHBT
ADS7263SRHBT
# Input Channels44
Analog Voltage AVDD(Max), V5.55.5
Analog Voltage AVDD(Min), V2.72.7
ArchitectureSARSAR
Digital Supply(Max), V5.55.5
Digital Supply(Min), V2.32.3
INL(Max), +/-LSB22
Input Range(Max), V5.55.5
Input TypeDifferential,Pseudo-DifferentialDifferential,Pseudo-Differential
Integrated FeaturesN/AN/A
InterfaceSPISPI
Multi-Channel ConfigurationMultiplexed,Simultaneous SamplingMultiplexed,Simultaneous Sampling
Operating Temperature Range, C-40 to 125-40 to 125
Package GroupVQFNVQFN
Package Size: mm2:W x L, PKG32VQFN: 25 mm2: 5 x 5(VQFN)32VQFN: 25 mm2: 5 x 5(VQFN)
Power Consumption(Typ), mW47.247.2
RatingCatalogCatalog
Reference ModeExt,IntExt,Int
Resolution, Bits1414
SINAD, dB8484
SNR, dB8585
Sample Rate (max), SPS1MSPS1MSPS
Sample Rate(Max), MSPS11
THD(Typ), dB-92-92

Eco Plan

ADS7263SRHBRADS7263SRHBT
RoHSCompliantCompliant

Application Notes

  • Using the Sequencer and Pseudo-Differential Features of the ADS8363
    PDF, 161 Kb, File published: May 21, 2014
  • Interfacing to the ADS8363 Pseudo-Differential Operating Mode
    PDF, 548 Kb, File published: Aug 4, 2014
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, File published: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revision: A, File published: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revision: B, File published: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revision: A, File published: Apr 16, 2015

Model Line

Series: ADS7263 (2)

Manufacturer's Classification

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)
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