Datasheet Texas Instruments CD4043BDW
| Manufacturer | Texas Instruments |
| Series | CD4043B |
| Part Number | CD4043BDW |

CMOS Quad NOR R/S Latch with 3-State Outputs 16-SOIC -55 to 125
Datasheets
CD4043B, CD4044B Types datasheet
PDF, 1.7 Mb, Revision: D, File published: Oct 13, 2003
Extract from the document
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 16 |
| Package Type | DW |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 40 |
| Carrier | TUBE |
| Device Marking | CD4043BM |
| Width (mm) | 7.5 |
| Length (mm) | 10.3 |
| Thickness (mm) | 2.35 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 2.65 |
| Mechanical Data | Download |
Parametrics
| 3-State Output | Yes |
| Bits | 4 |
| F @ Nom Voltage(Max) | 8 Mhz |
| ICC @ Nom Voltage(Max) | 0.06 mA |
| Operating Temperature Range | -55 to 125 C |
| Output Drive (IOL/IOH)(Max) | 1.5/-1.5 mA |
| Package Group | SOIC |
| Package Size: mm2:W x L | 16SOIC: 59 mm2: 6 x 9.9(SOIC) PKG |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | CD4000 |
| VCC(Max) | 18 V |
| VCC(Min) | 3 V |
| Voltage(Nom) | 10 V |
| tpd @ Nom Voltage(Max) | 140 ns |
Eco Plan
| RoHS | Compliant |
Application Notes
- Understanding Buffered and Unbuffered CD4xxxB Series Device CharacteristicsPDF, 188 Kb, File published: Dec 3, 2001
Both buffered and unbuffered CMOS B-series gates inverters and high-current IC products are available from TI. Each product classification has application advantages in appropriate logic-system designs. Many CMOS suppliers have concentrated on promoting buffered B-series products with applications literature focusing on the attributes and use of the buffered types. This practice has left an imb - Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
Model Line
Series: CD4043B (14)
Manufacturer's Classification
- Semiconductors > Logic > Flip-Flop/Latch/Register > Other Latch