Datasheet Texas Instruments CD74AC240

ManufacturerTexas Instruments
SeriesCD74AC240
Datasheet Texas Instruments CD74AC240

Octal Inverting Buffer/Line Drivers with 3-State Outputs

Datasheets

CD54/74AC240/241/244, CD54/74ACT240/241/244 datasheet
PDF, 1.2 Mb, Revision: B, File published: Jan 19, 2004
Extract from the document

Prices

Status

CD74AC240ECD74AC240EE4CD74AC240MCD74AC240M96
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNo

Packaging

CD74AC240ECD74AC240EE4CD74AC240MCD74AC240M96
N1234
Pin20202020
Package TypeNNDWDW
Industry STD TermPDIPPDIPSOICSOIC
JEDEC CodeR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-G
Package QTY2020252000
CarrierTUBETUBETUBELARGE T&R
Device MarkingCD74AC240ECD74AC240EAC240MAC240M
Width (mm)6.356.357.57.5
Length (mm)24.3324.3312.812.8
Thickness (mm)4.574.572.352.35
Pitch (mm)2.542.541.271.27
Max Height (mm)5.085.082.652.65
Mechanical DataDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsCD74AC240E
CD74AC240E
CD74AC240EE4
CD74AC240EE4
CD74AC240M
CD74AC240M
CD74AC240M96
CD74AC240M96
Bits8888
F @ Nom Voltage(Max), Mhz100100100100
ICC @ Nom Voltage(Max), mA0.080.080.080.08
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA-24/24-24/24-24/24-24/24
Package GroupPDIPPDIPSOICSOIC
Package Size: mm2:W x L, PKGSee datasheet (PDIP)See datasheet (PDIP)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)
RatingCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNo
Technology FamilyACACACAC
VCC(Max), V5.55.55.55.5
VCC(Min), V1.51.51.51.5
Voltage(Nom), V1.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,5
tpd @ Nom Voltage(Max), ns82,9.2,6.582,9.2,6.582,9.2,6.582,9.2,6.5

Eco Plan

CD74AC240ECD74AC240EE4CD74AC240MCD74AC240M96
RoHSCompliantCompliantCompliantCompliant
Pb FreeYesYes

Application Notes

  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, File published: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Model Line

Manufacturer's Classification

  • Semiconductors> Logic> Buffer/Driver/Transceiver> Inverting Buffer/Driver