Datasheet Texas Instruments CDC3RL02
| Manufacturer | Texas Instruments |
| Series | CDC3RL02 |
Dual-Channel Square/Sine-to-Square Wave Clock Buffer
Datasheets
CDC3RL02 Low Phase-Noise Two-Channel Clock Fan-Out Buffer datasheet
PDF, 835 Kb, Revision: D, File published: Apr 12, 2017
Extract from the document
Status
| CDC3RL02BYFPR | CDC3RL02YFPR | |
|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | Yes |
Packaging
| CDC3RL02BYFPR | CDC3RL02YFPR | |
|---|---|---|
| N | 1 | 2 |
| Pin | 8 | 8 |
| Package Type | YFP | YFP |
| Industry STD Term | DSBGA | DSBGA |
| JEDEC Code | R-XBGA-N | R-XBGA-N |
| Package QTY | 3000 | 3000 |
| Carrier | LARGE T&R | LARGE T&R |
| Device Marking | 4LN | 4L2 |
| Pitch (mm) | .4 | .4 |
| Max Height (mm) | .5 | .5 |
| Mechanical Data | Download | Download |
Parametrics
| Parameters / Models | CDC3RL02BYFPR | CDC3RL02YFPR |
|---|---|---|
| Additive RMS Jitter(Typ), fs | 370 | 370 |
| Input Frequency(Max), MHz | 52 | 52 |
| Input Level | SINE / SQUARE | SINE / SQUARE |
| Number of Outputs | 2 | 2 |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 |
| Output Frequency(Max), MHz | 52 | 52 |
| Output Level | SQUARE | SQUARE |
| Package Group | DSBGA | DSBGA |
| Package Size: mm2:W x L, PKG | See datasheet (DSBGA) | See datasheet (DSBGA) |
| Rating | Catalog | Catalog |
| VCC Out, V | 1.8 | 1.8 |
Eco Plan
| CDC3RL02BYFPR | CDC3RL02YFPR | |
|---|---|---|
| RoHS | Compliant | Compliant |
Model Line
Series: CDC3RL02 (2)
Manufacturer's Classification
- Semiconductors> Clock and Timing> Clock Buffers> Single-Ended