Datasheet Texas Instruments CDC5801ADBQRG4
| Manufacturer | Texas Instruments |
| Series | CDC5801A |
| Part Number | CDC5801ADBQRG4 |
Low Jitter Clock Multiplier & Divider w/Programmable Delay & Phase Alignment 24-SSOP -40 to 85
Datasheets
Low Jitter Clock Multiplier & Divider w/Programmable Delay & Phase Alignment datasheet
PDF, 613 Kb, Revision: A, File published: Dec 13, 2005
Extract from the document
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 24 |
| Package Type | DBQ |
| Industry STD Term | SSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2500 |
| Carrier | LARGE T&R |
| Device Marking | CDC5801A |
| Width (mm) | 3.9 |
| Length (mm) | 8.65 |
| Thickness (mm) | 1.5 |
| Pitch (mm) | .64 |
| Max Height (mm) | 1.75 |
| Mechanical Data | Download |
Parametrics
| Input Level | LVCMOS |
| Number of Outputs | 1 |
| Operating Temperature Range | -40 to 85 C |
| Output Frequency(Max) | 62.5 MHz |
| Output Frequency(Min) | 150 MHz |
| Output Level | LVDS,LVPECL,LVTTL |
| Package Group | SSOP |
| Package Size: mm2:W x L | 24SSOP: 52 mm2: 6 x 8.65(SSOP) PKG |
| Programmability | Pin configuration |
| Special Features | Spread Spectrum Clocking (SSC) |
| VCC Core | 3.3, V |
| VCC Out | 3.3, V |
Eco Plan
| RoHS | Compliant |
Model Line
Series: CDC5801A (4)
- CDC5801ADBQ CDC5801ADBQG4 CDC5801ADBQR CDC5801ADBQRG4
Manufacturer's Classification
- Semiconductors > Clock and Timing > Clock Generators > General Purpose